How to set my bios setting

Ok I have a stick of pc3200 corsair xms memory, it says the cas latencey is 2-3-3-6-T1, sow what do each of those numbers translate to in terms of bios setings?

kyleboy7 said:

Ok I have a stick of pc3200 corsair xms memory, it says the cas latencey is 2-3-3-6-T1, sow what do each of those numbers translate to in terms of bios setings?

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Using A7N8X bios as example for the Corsair 3200C2:

Active (to) Precharge Delay = 6 (aka Tras)
RAS to CAS Delay = 3 (aka Trcd)
RAS Precharge Delay = 3 (aka Trp, Precharge to Active)
CAS Latency = 2 (aka CAS)
Cmd Rate = 1T (some bios does not have this, set automatically)


Memory cells in a DRAM chip are organized as rows and columns. To access data, first has to access a row (which contains a block/page of data). Then has to access columns (a subset of the row data). Then data will be output. Then followed by precharge (restore DRAM cell data and back to normal state).

Using commonly available (as of today) 256 MB as an example, each column access will output 8 bit of data from a DRAM chip. 8 chips form a bank which gives 64 bit of data which is the data path of a memory module. Some modules have two banks, e.g. 512 MB.

DRAM chip cycles look like this:

Active Precharge Active Precharge Active Precharge ...

Active = row access + column access
or
Active = row access + column access + column access + ...
(for more than 1 column access to burst more data of a page to reduce access overhead)

DRAM cycle = Trcd + CAS + Trp (Trp is precharge)
or
DRAM cycle = Trcd + CAS + CAS + ... + CAS + Trp

Trcd + CAS = number of cycles to get 1st data out
Trcd + CAS + CAS = number of cycles to get 2nd data out (if data is in the same page)
...


CAS Latency is most important for memroy bandwidth, or for bursting a large block/page of data like in 3D, video, gaming applications. Set it to 2 whenever possible. Most memory modules I came across have no problem taking CAS 2.

2nd important is the RAS to CAS Delay (Trcd). It is the number of cycles between the row and column access. 2 is good, but 3 is OK.

The Precharge Delay (Trp) is the precharge time after an active access. 2 is good, but 3 is OK.

Active to Precharge Delay (Tras) is the minimum time for an active access (to perform a single row and column access). It is the least importance for memory performance. Usually 6 or 7 is fine.