AMD to migrate Athlon XP to 754 pins

Prolly been posted already but:

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Interesting how the xp and the athalon 64 can run on the same mobo...

Hmmmmmmmm.....
HHMMMMMMMMMM....

AMD to migrate Athlon XP to 754 pins

Sources confirm it for next year


By Mike Magee: Thursday 21 August 2003, 16:20

WE NOW HAVE CONFIRMATION of an earlier story at Xbit Labs saying that AMD will use a 754 pin layout in the future.
The chip will use single channel DDR but won't be available until Q3 of next year and currently masquerades under the codename Paris. When it moves to 90 nanometers it will be codenamed Victoria.

The CPU, despite the pin count, will only run in 32-bits but our sources tell us that it will ran faster than the current 462 pinout. µ

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isnt the memory controller integrated on the Athlon64? does that mean despite this the motherboards chipsets still have one?

Makes sense as it rationalises production lines and reduces SKU's. I would expect them to have an on board memory controller and SSE2 just no 64 bit support so to effectively segment the market. These chips will naturally replace the Bartons.

Thats bull from the rumor mill. If anything like that it will be a Athlon FX with no 64bit support, which is unlikly based on how hard AMD is pushing amd64. Also isn't the hammer series just a cut and paste job of the athlon XP, with some archtecture limitations removed and 64 bit stuff plus onbord memory controller. and how much money is going to be spent for effectivly a remake of the hammers. Also there is a possibilty they want to turn athlon xp into a prescot p4 power wise, so they run more power lines to it. Also the processor will not be compatible with hammer chipsets (unless this is some pentium M job (p3 with mega cache and p4 bus)).

Another issue is how are the existing going to work. Do we have another 400mhz FSB problem. Also I think AMD has reached the end of the timing specs for the EV6 bus. That is why amd eliminated it from the hammers and gave the hammers a new bus (hypertransport, which is actually a inter chipset link not a CPU link).

bulk88 said:

Thats bull from the rumor mill. If anything like that it will be a Athlon FX with no 64bit support, which is unlikly based on how hard AMD is pushing amd64. Also isn't the hammer series just a cut and paste job of the athlon XP, with some archtecture limitations removed and 64 bit stuff plus onbord memory controller. and how much money is going to be spent for effectivly a remake of the hammers. Also there is a possibilty they want to turn athlon xp into a prescot p4 power wise, so they run more power lines to it. Also the processor will not be compatible with hammer chipsets (unless this is some pentium M job (p3 with mega cache and p4 bus)).

Another issue is how are the existing going to work. Do we have another 400mhz FSB problem. Also I think AMD has reached the end of the timing specs for the EV6 bus. That is why amd eliminated it from the hammers and gave the hammers a new bus (hypertransport, which is actually a inter chipset link not a CPU link).

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In one word: Huh???
These new chips are gonna be named AthlonXP and are gonna be stripped hammers, they will have their 64bit support removed and the L2 cache made 256KB

What do u mean turn AthlonXP into a prescott power wise? Running more power lines? eh?? The chips are gonna be using SOI, and if perfected by the time they get released they are gonna be very cool running chips. Hammers only eat lots of juice due to their massive L2 cache, remove it and its power draw reduces dramatically.

Also they aren't remaking the hammer, they are just stripping it. Its not gonna cost them much money doing so

What do you mean 400Mhz FSB problem? The chips have the memory controller on the die, and technically their FSB is the same as the chip's clock speed