- Joined
- Feb 25, 2002
- Location
- Ogden, Utah, USA
I was just wondering what the difference between the palomino and the Thoroughbred CPU's are. I have a Palomino and I don't know the difference.???
Welcome to Overclockers Forums! Join us to reply in threads, receive reduced ads, and to customize your site experience!
Falseprophet said:I was just wondering what the difference between the palomino and the Thoroughbred CPU's are. I have a Palomino and I don't know the difference.???
Just one thing about that chart the Paris is not the upcoming A64 rather it is supposed to be the *******ised version of the XP on a 754 pin configuration - either that or A64's with less L2 cache and the Victoria is meant to be the 90nm version of the Paris.c627627 said:
hitechjb1 (04-30-2003 04:33 PM) said:If you can see the chip die physically, as someone already pointed out, palomino is more square shape like and the Tbred A and B are more rectangular like.
The palomino are bigger in die size 128 mm^2, compared to 80 and 84 mm^2 for Tbred A and B.
If you can see the transistors and can count them, the palomino has 37.5 million, whereas the Tbred A and B have 37.2 and 37.6 millions respectively.
If your eye is powerful enough and able to go inside the chip and see the transistors, the palomino transistors have a width of 0.18 micron and whereas the Tbred transistors have a width of 0.13 micron.
If you are able to count the number of metal wires, the palomino has 7 layers, whereas Tbred A has 8 layers and Tbred B has 9 layers.
OK, back to business. Since we probably can't see these with our naked eyes, ...
But if the chip is already covered by the HSF, and you cannot see the die shape, the stepping, ... This is the trick to find out:
Palomino has only one default Vcore of 1.75V. Tbred A and Tbred B has multiple default Vcore of 1.5 (the famous 1700+ DLT3C), 1.6 and 1.65 V depends on the PR rating of the Tbred.
You can get into the bios, set the Vcore to default.
If it says 1.75 V then it is a palomino.
If it is 1.5 or 1.6 or 1.65 V, it is a Tbred A or B.
OC Detective said:Yes I think you are right a combination of gate resizing and smaller channel length has meant a reduction in supply voltage meaning increased potential for overclocking. The fact that sub threshold leakage current increases exponentially for a corresponding decrease in threshold voltage (whilst the comparison between a DUT3C and DLT3C is only 7%) means that threshold voltage is not being scaled with supply voltage helped possibly by tighter pmos:nmos ratios?
OC Detective said:Yes I think you are right a combination of gate resizing and smaller channel length has meant a reduction in supply voltage meaning increased potential for overclocking. The fact that sub threshold leakage current increases exponentially for a corresponding decrease in threshold voltage (whilst the comparison between a DUT3C and DLT3C is only 7%) means that threshold voltage is not being scaled with supply voltage helped possibly by tighter pmos:nmos ratios?