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X-bit Labs takes their shot at Latency controversy

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Speed_Mechanic2

Member
Joined
Aug 15, 2003
Location
Ft. Hood, TX
X-bit Labs has a semi-indepth article on Intel P4-C (800 FSB) performance with memory at various settings of latency. The article, Choosing Optimal Memory to Match Intel Pentium 4 Processor, is split into 2 main parts. The first 7 pages deals with what latencies work best while at stock (200MHz) FSB. The second part, from page 8 on, deals with the effect of latency on overclocking performance.

Basically it reconfirms that low-latency is most important. It also confirms that tRCD (RAS to CAS Delay) and tRP (RAS Precharge) are more important then CL (CAS timings). Many times have I seen people post their "tight" timings, which turn out to be something like 2-4-4-5 or 2-4-3-5. They think that because their CAS is 2.0 then they are running good, when in fact they are running at dangerous settings (tRAS should be CAS + tRCD; never less).

The Influence of Async Overclocking with Low Timings (the main arguement) in Real-World (gaming) settings has results shown on page 13. The highest performance occurs when using Async (5:4) with lowest timings. While not graphed, performance would be optimum with memory that is capable of running 230-240MHz (at 2-2-2-5) running 4:5 with FSB.

You all should read the review, but in case your lazy, here are the conclusions:
  • Memory timings affect the performance of the Pentium 4 platform quite perceptibly. So, if you have spent money on an expensive processor, do not save on memory. Memory modules with less aggressive timings will not allow the processor to work at its best.
  • Performance is mostly affected by RAS# to CAS# Delay and RAS# Precharge parameters. These are the settings you should strive to reduce in the first place. As for CAS Latency, the influence of this parameter on the performance is less evident than we usually think.
  • It is preferable to use the memory and the CPU buses at the same frequency, that is in synchronous mode. That’s why it makes sense to buy overclocker memory, capable of supporting high frequencies, if you are into overclocking. On the other hand, the performance gain you have when using overclocker memory is rather small compared to the performance of ordinary DDR SDRAM working asynchronously with the FSB.
  • You should not be afraid of using diminishing coefficients for the memory frequency. If you compensate with lower timings the effects of the asynchronous mode, you will have just a little performance drop.
  • Overclocker memory with operational frequencies much over 400MHz cannot work with aggressive timings at 400MHz. Analogously, DDR400 SDRAM that works at 400MHz with 2-2-2-5 timings is usually non-operational at higher frequencies.
 
I'm intrigued by this concept of "unsafe" timings - I've never heard about this before... how does it work? In what way are non-standard timings dangerous? Would 3-3-3-6 be a "dangerous" timing?
 
No, 3-3-3-6 is fine. Although 3-3-3-8 may, or may not, be better or would be the same.

The issue is with tRAS and tRCD + CAS timings. Putting it generally, you do not want your tRAS to be anything less then tRCD + CAS (in 3-3-3-6 this works fine; as 3+3 = 6). Mushkin issues this write-up when asked about tRAS timings.
http://www.mushkin.com/mushkin/pop-up/latencies.htm

Quoted from their article:
Now imagine someone closes the book you are reading from in the middle of a sentence. Right in your face! And does it over and again. This is what happens if tRAS is set too short. So here is the really simple calculation: The second burst of four has at least to be initiated and prefetched into the output buffers (like you get a glimpse at the headline in a book) before you can close the page without losing all information. That means that the minimum tRAS would be tRCD+CAS latency + 2 cycles (to output the first burst of four and make way for the second burst in the output buffers).
 
3-3-3-6 is weird since you would not expect for Cas to be equal or above TRP od TRCD. I seen it though.
The last number ie TRAS should be by a rule of thumb CAS+TRCD+2, and anything below CAS+TRCD is unsafe ie unstable. Thus 3-4-4-8 makes sense but 3-4-4-9 would be more appropriate. 3-3-3-6 is probably incompatible with the most memory out there. Rules are always to be broken though.
 
Mmmm velly intellesting........


When Gouda & Dirty Punk see this thread they are gonna freak!!!:-/ :eh?:
 
whatever2003 said:
3-3-3-6 is weird since you would not expect for Cas to be equal or above TRP od TRCD. I seen it though.
The last number ie TRAS should be by a rule of thumb CAS+TRCD+2, and anything below CAS+TRCD is unsafe ie unstable. Thus 3-4-4-8 makes sense but 3-4-4-9 would be more appropriate. 3-3-3-6 is probably incompatible with the most memory out there. Rules are always to be broken though.

Mushkin does give a reason for needing CAS+TRCD+2; to send out first burst and enter the second- so how could you go below this without suffering instability or speed decrease?
 
I'm pretty sure the Corsair is double-sided, but what about the PC3700 and PC4000 OCZ? Aren't those single-sided modules? Single-sided modules have poopy bandwidth.

I'm just wondering if they're comparing apples to apples.
 
Hmmmm... I'm waiting on a pair of Corsair Twinx1024-4000Pro modules. I'm getting them for free, so I can't complain. However I was a bit worried when I saw that they recommend latency settings of 3-4-4-8 (link).

Does anyone know how highly rated memory does at lower speeds with low latency?
 
cursor said:
Hmmmm... I'm waiting on a pair of Corsair Twinx1024-4000Pro modules. I'm getting them for free, so I can't complain. However I was a bit worried when I saw that they recommend latency settings of 3-4-4-8 (link).

Does anyone know how highly rated memory does at lower speeds with low latency?

pc4000 can't run at 2-5-2-2, max to 2-5-3-2 up to max 220mhz with over 3v usually :(
 
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