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Up on www.overclockers.com is something I have been waiting to hear. New memory technology! DDR2 sounded to me like a rehash of old technology - compromising latency for a boost in speed.
The current SDRAM platform has been around since the i440 chipset, which is 1998 era - so I have recently been thinking that the next technology to get a boost is the RAM. Hypertransport replaces the FSB and NB->SB communications, PCI-e is the new peripheral I/O standard that does away with PCI buses, AMD Athlon 64's uberness means the on-die memory architecture does away with a separate northbridge and provides an expanded x86-64 instruction set. Even the form factor has been updated - BTX, so the only thing left was the SDRAM architecture.
Now the conventional memory bus is to be replaced by FB-SDRAM - and for those of you who can't be bothered to read the article here is the cliffnotes version:
Although this is primarily a server application, I wouldn't be surprised to see high-end desktops with this in the near future.
Discuss
The current SDRAM platform has been around since the i440 chipset, which is 1998 era - so I have recently been thinking that the next technology to get a boost is the RAM. Hypertransport replaces the FSB and NB->SB communications, PCI-e is the new peripheral I/O standard that does away with PCI buses, AMD Athlon 64's uberness means the on-die memory architecture does away with a separate northbridge and provides an expanded x86-64 instruction set. Even the form factor has been updated - BTX, so the only thing left was the SDRAM architecture.
Now the conventional memory bus is to be replaced by FB-SDRAM - and for those of you who can't be bothered to read the article here is the cliffnotes version:
- Intel have come up with a spanky new memory addressing architecture that is primarily server-based. It puts a buffer/controller chip on the memory module and uses conventional memory chips after the buffer.
- The data and commands are transmitted serially á la PCI-express - reducing the need for millions of perfectly matched-length bus wires from the NB, and reduces the loading on the NB when driving lots of memory modules.
- Many more channels can be implemented using the same number of layers on the motherboard at the same cost, or less layers for less channels and less cost. There is also a decent length of PCB trace allowed - 12 inches, which effectively removes the ceiling imposed by high-speed DDR2/3 buses
- Reads and writes can be performed simultaneously so although the latencies due to the serial commands and buffer chips are higher, you can achieve much more throughput due to the multitasking offered.
- It uses normal DDR/2/3 chips, so requires no extra cost other than that for the buffer chip.
Although this is primarily a server application, I wouldn't be surprised to see high-end desktops with this in the near future.
Discuss