where from here.

[makks]

Hi.
I am running P4 2.4C
2 sticks 512 kingston HyperX Ram PC3500
Gigabyet MB (ver 1.)



I have upped the FSB to 220.
Core sp. is now 2687.4
Bus Speed is now 895.8

Memory:
Frequency 179.2 MHZ
FSB:DRAM - 5:4
CAS# Lat. 2.5
RAS# to CAS# Delay 4
RAS# Precharge 4
Cycle Time (tras) 8

I have the RAM setting in BIOS to Auto. I have upped the voltage on
the ram by one notch

My temps are great...25C with no stress. 33c running 3Dmark

My question is, can a squeeze a little more out and stay stable?
If so, what would be the best way to do it?

Thanks in advance

[Jimbob7]

You should be good for 3.0 (250fsb) Just push it and see how far it will go, and don't go over 1.65 vcore. :)

[Xymurgy]

Yea, you have a lot of room left. I'd say you're premature putting it in 5:4 already, could also try tightening the timings to 2-3-2-7 (don't be afraid to put 2.8 volts into the memory).

But I'd shoot for around 250ish fsb in 5:4 (don't forget to tighten the timings!).

[makks]

So I should keep going and when it gets unstable use the up the v-core?
What about the voltage for the RA:)

[Xymurgy]

Definitely. I hate to boost your expectations, but I read a lot about 2.4C's that get to 250fsb on stock voltage.

Raising vcore is a last resort, and only if your temps will allow it (with your temps, I'd say you could up the vcore a bit without worry).

What's RA voltage? RAM?

[johan851]

Voltage for the RAM should be perfectly safe up to 2.9v or so. Lots of people run at 3.2v with no concerns, but for now I'd stay under 3.0v.

Like people have said, tighten up your timings. That'll help memory throughput a lot.

[makks]

Would love to tighten up timing, but I am really not sure where begin.
That is what part of the timing I experiment with first.
Current RAM V is 2.7

Here are some stats on my Memory:

Power supply : Vdd: 2.6V ± 0.2V, Vddq: 2.6V ± 0.2V
Double-data-rate architecture; two data transfers per clock cycle
Bidirectional data strobe(DQS)
Differential clock inputs(CK and CK)
DLL aligns DQ and DQS transition with CK transition
Programmable Read latency 2.5 (clock)
Programmable Burst length (2, 4, 8)
Programmable Burst type (sequential & interleave)
Timing Reference: 2.5-3-3-7-1 at +2.6V
Edge aligned data output, center aligned data input[

[Xymurgy]

A crash course on your memory: lower is always better, but is possibly unstable. Keep the numbers as low as stability allows.

Keep CAS at either 2 or 2.5. I've actually had memory perform better at 2.5 rather than 2

You'll probably need to keep RAS to CAS at 3. Keep this number as low as possible (but you probabably won't ever get this at 2 when you get past 200 fsb on the memory). This is the number which produces the most effect.

RAS Precharge: try to keep at 2

tRAS: make this equal the sum of the other three numbers.







If your memory is still at 180fsb, you could probably do 2-2-2-6 timings. As you increase the fsb past 200, you'll need to increase RAS to CAS as well as tRAS.

And again, don't be afraid to put 2.8 volts into it.

Use memtest86 to test for stability.

[makks]

THANKS!!