- Joined
- Aug 1, 2003
- Location
- Round Rock, TX
How the tRAS value affects Memory Bandwidth on the nForce4 Chipset : UPDATED
I did some Memory Bandwidth testing using Memtest86 v3.2 and wanted to know if others were getting roughly the same results.
Test setup :
AMD Athlon 64 FX-55 (2.6GHz) @ 1.385v
OCZ EL DDR PC-3200 Platinum Revision 2 @ 2.6v
Asus A8N-SLI Socket-939 Nforce4 Motherboard BIOS 1003.5b
Previous Conclusion :
On all nForce Chipsets, use a tRAS setting of 8,9, or 10 for Best Results.
Update :
I have done additional, extensive testing using the latest Beta BIOS (1003.5) for the Asus A8N-SLI which enables advanced RAM timings for the nForce 4.
I found that with the ability to change advanced timings in the BIOS, I get higher bandwidth with a lower Tras and Trc.
The new BIOS allows adjusting of the following values:
1T/2T Memory Timing
CAS Latency (Tcl)
RAS to CAS Delay (Trcd)
Min RAS Active Time (Tras)
Row Precharge Time (Trp)
Row Cycle Time (Trc)
Row Refresh Cycle Time (Trfc)
Write Recovery Time (Twr)
Read to Write Delay (Trwt)
I get best results at 200FSB of 1T-2-2-5-2-7-9-2-1, not the long recommended Tras of 8-10.
Test setup was as follows:
Tras 5 : 1T-2-2-5-2-7-9-2-1
Tras 8 : 1T-2-2-8-2-10-9-2-1
Tras 10 : 1T-2-2-10-2-12-9-2-1
I did some Memory Bandwidth testing using Memtest86 v3.2 and wanted to know if others were getting roughly the same results.
Test setup :
AMD Athlon 64 FX-55 (2.6GHz) @ 1.385v
OCZ EL DDR PC-3200 Platinum Revision 2 @ 2.6v
Asus A8N-SLI Socket-939 Nforce4 Motherboard BIOS 1003.5b
Previous Conclusion :
On all nForce Chipsets, use a tRAS setting of 8,9, or 10 for Best Results.
Update :
I have done additional, extensive testing using the latest Beta BIOS (1003.5) for the Asus A8N-SLI which enables advanced RAM timings for the nForce 4.
I found that with the ability to change advanced timings in the BIOS, I get higher bandwidth with a lower Tras and Trc.
The new BIOS allows adjusting of the following values:
1T/2T Memory Timing
CAS Latency (Tcl)
RAS to CAS Delay (Trcd)
Min RAS Active Time (Tras)
Row Precharge Time (Trp)
Row Cycle Time (Trc)
Row Refresh Cycle Time (Trfc)
Write Recovery Time (Twr)
Read to Write Delay (Trwt)
I get best results at 200FSB of 1T-2-2-5-2-7-9-2-1, not the long recommended Tras of 8-10.
Code:
Tras MB/s
5 2220
8 2172
10 2083
Test setup was as follows:
Tras 5 : 1T-2-2-5-2-7-9-2-1
Tras 8 : 1T-2-2-8-2-10-9-2-1
Tras 10 : 1T-2-2-10-2-12-9-2-1
Last edited: