XP vs Athlon Temps

[ve6jhc]

A friend is running an Athlon 1400 on an Abit KG7 Raid MB. He had a chance to upgrade his CPU to the new Athlon XP 1600+. He did some testing before and after. The heatsink he uses is a plain jane Thermal Take Volcano II used unlapped with no name thermal paste. The tests were done the same day with everything being the same except for the CPUs.

Athlon 1400 full load temp 53C

XP 1600+ full load temps 46C

As both CPUs are really 1400s the new .13 CPu seems to have a nice cooling advantage.

[Microsoft]

i twill burn up just as fast as a regualr

[tbirdkiri]

sorry but the XP's are still .18

[LinkStatic]

yup... AXP's are still using 0.18u technology... I forgot what AMD calls there 0.13u line of chips... , thoroughbred I think....

[ve6jhc]

Here I was all bend because my friend had the new CPU!!! He was bragging that it was the .13 and had thermal protection...It seems that the only difference is that the XP has the new trendy name and the mega trenches of the L1s...Any other differences that anyone knows of?

[LinkStatic]

one noticeable difference is the added instructions for AMD 3DNow instruction set, which includes support for SSE ( Full ). The XP also features the QuantiSpeed Architecture, said to provide boost in applications execution thru its enhanced pipeline technology... and of course, better cooling features ( though they fry easily when the heatsink is removed )

[Placid]

I dont think the XP has thermal protection, it does have a built in thermistor like intel cpu's but so far no amd motherboards make use of it.

http://athlonxp.amd.com/overview/quantiSpeedArchitecture.jsp

Key Architectural Features of the AMD Athlon™ XP Processor

QuantiSpeed™ Architecture for enhanced performance
Nine-issue superpipelined, superscalar x86 processor microarchitecture designed for high performance
Multiple parallel x86 instruction decoders
Three out-of-order, superscalar, fully pipelined floating point execution units, which execute x87 (floating point), MMX™ and 3DNow!™ instructions
Three out-of-order, superscalar, pipelined integer units
Three out-of-order, superscalar, pipelined address calculation units
72-entry instruction control unit
Advanced hardware data prefetch
Exclusive and speculative Translation Look-aside Buffers
Advanced dynamic branch prediction
3DNow!™ Professional technology for leading-edge 3D operation
21 original 3DNow!™ instructions—the first technology enabling superscalar SIMD
19 additional instructions to enable improved integer math calculations for speech or video encoding and improved data movement for Internet plug-ins and other streaming applications
5 DSP instructions to improve soft modem, soft ADSL, Dolby Digital surround sound, and MP3 applications
52 SSE instructions with SIMD integer and floating point additions offer excellent compatibility with Intel's SSE technology
Compatible with Windows® XP, Windows 98, Windows 95, and Windows NT® 4.x operating systems
266MHz AMD Athlon™ XP processor system bus enables excellent system bandwidth for data movement-intensive applications
Source synchronous clocking (clock forwarding) technology
Support for 8-bit ECC for data bus integrity
Peak data rate of 2.1GB/s
Multiprocessing support: point-to-point topology, with number of processors in SMP systems determined by chipset implementation
Support for 24 outstanding transactions per processor
The AMD Athlon™ XP processor with performance-enhancing cache memory features 64K instruction and 64K data cache for a total of 128K L1 cache. 256K of integrated, on-chip L2 cache for a total of 384K full-speed, on-chip cache.

Socket A infrastructure designs are based on high-performance platforms and are supported by a full line of optimized infrastructure solutions (chipsets, motherboards, BIOS). Available in Pin Grid Array (PGA) for mounting in a socketed infrastructure Electrical interface compatible with 266MHz AMD Athlon XP system buses, based on Alpha EV6™ bus protocol

Die size: approximately 37.5 million transistors on 128mm2. Manufactured using AMD's state-of-the-art 0.18-micron copper process technology at AMD's Fab 30 wafer fabrication facility in Dresden, Germany.



QuantiSpeed™ Architecture
QuantiSpeed™ architecture allows the AMD Athlon™ XP processor to accomplish more instructions per clock cycle (IPC).

Improved IPC is a result of the following technological advances.
Nine-issue, superscalar, fully pipelined microarchitecture: Provides more pathways to feed application instructions into the execution engines of the core, allowing the processor to complete more work in a given clock cycle (high IPC). The delicate balance between the depth of the pathways and clock speed of the processor produces high levels of performance.
Superscalar, fully pipelined Floating Point Unit (FPU): Completes more floating point operations per clock cycle than competitive x86 processors and permits high operating frequencies. The end result is a processor with the computing power to tackle the most computation-intensive software applications.
Hardware data prefetch: Prefetches data from system memory to the processor's Level 1 cache, which reduces the time it takes to feed the processor critical data, increasing work throughput and therefore overall performance.
Exclusive and speculative Translation Look-aside Buffers (TLBs): Keep the maps to critical data close to the processor, which helps prevent the processor from stalling or waiting when future data is requested. These TLB structures are now larger, exclusive between caches, and speculative. Larger TLB's give the AMD Athlon XP processor access to additional data maps. Exclusivity removes the duplication of information, freeing up more space in the Level 2 cache for other useful data to be used by the processor. And the speculative nature of these structures allows the processor to generate future maps of critical data quickly.
These four key advances allow QuantiSpeed architecture to perform more calculations per second, boosting overall productivity and enabling an ultimate computing experience.

[Genis B]

geez dat post make me dizzzy:D