• Welcome to Overclockers Forums! Join us to reply in threads, receive reduced ads, and to customize your site experience!

(un)expected timing numbers?

Overclockers is supported by our readers. When you click a link to make a purchase, we may earn a commission. Learn More.

Timothy Miller

Registered
Joined
Jul 1, 2008
Location
Binghamton, NY
I have some Crucial DDR3 DIMMs. I'm experimenting to see what timing numbers I could get it to work with at stock voltage.

Right now, I'm working in tRAS. According to the Micron datasheet, 24 is the correct value for this. I reduced it 4 at a time and ran stress tests. I've gotten it down to 9 (the minimum setting in the BIOS), and it continues to work just fine under VERY heavy compute load, and it has been running for 8 hours.

Should I be surprised? I know Crucial conservatively bins their parts, but wow. Reactions?
 
thats crazy , what are your other settings and speed?

Well, I haven't worked my way through all of the timings yet. Here are the defaults and timings according to the Micron spec (which differ slightly from SPD, it turns out):

1333MHz
1.50v
CL 9
tRCD 9
tRP 9
tRAS 24
tRFC 74
tWR 10
tWTR 5
tRRD 4
tRTP 5

Now, it turns out that my MSI mobo is kinda crappy, so to get the RAMs to work correctly at defaults, I have to raise the voltage to 1.54. No biggie.

Anyhow, here are the timing numbers that I'm at right now (because I'm part way through the experimentation):

1333MHz
1.54v
CL 8 *
tRCD 8 *
tRP 8 *
tRAS 9 *
tRFC 74
tWR 10
tWTR 5
tRRD 4
tRTP 5

I know that CL=7 doesn't work. But I haven't tried tRCD or tRP at 8 yet. I figured I'd sorta lower everything gradually rather than trying to find the bare minimum. Then again, I should probably want to get the ones at the top low first because they're more important.
 
How I overclocked my memory

Alright then. Here are my final results. I kept getting some inconsistent results that turned out to be due to a bug in the BIOS for my board. Certain of the memory timing numbers in the BIOS don't get applied to the hardware until the next cold boot, so I would get some ridiculous timing numbers that seemed to work but then didn't when I would cold boot. In my initial post in this thread, I provided the numbers consistent with the memory spec, but when I do a performance test, the results are slightly slower than what I get from SPD. For the numbers below, I set the voltage up by 80mv to 1.58v and systematically reduced each one in order until they system wouldn't boot or wouldn't run the stress test correctly for at least 8 hours.

1333MHz
1.58v
CL 7
tRCD 6
tRP 5
tRAS 9
tRFC 50
tWR 4
tWTR 4
tRRD 4
tRTP 4

I could get CAS 8 at 1.54v. 1.58v was required for CAS 7. tWTR, and tRTP specify 4 cycles or 7.5ns (5 cycles here), whichever is greater, and tRRD is 4 cycles; this suggests that that there's some pipelining, so I'm not going to screw with it, and these aren't critical numbers anyhow.

Correct tRFC is somewhere between 45 and 50. But since refresh only happens every 7.8 microseconds, I'm not going to screw with it.

[I can't count on these numbers remaining stable for a really long period. Circuit aging is probably going to catch up with me at some point. Those factors include things like metal migration, hot carrier injection, and negative bias threshold inversion. This is particularly a problem at 45nm and smaller.]
 
Back