MedRed's Watercooled i7: Ice Ice Baby

Ai Overclock Tuner.....................[Manual]
CPU Ratio Setting......................[21.0]
Intel (R) SpeedStep (TM) Tech...........[Disabled]
Xtreme Phase Full Power Mode...........[Enabled]
BCLK Frequency.........................[200]
PCIE Frequency.........................[100]
DRAM Frequency.........................[DDR3 - 2005 MHz]
UCLK Frequency.........................[AUTO]
QPI Link Data Rate.....................[AUTO]

CPU Voltage Control....................[MANUAL]
[COLOR="Red"]CPU Voltage............................[1.40000][/COLOR]
CPU PLL Voltage........................[1.80]
[COLOR="Red"]QPI/DRAM Core Voltage..................[1.61250][/COLOR]
IOH Voltage............................[1.14]
IOH PCIE Voltage.......................[1.50]
ICH Voltage............................[1.20]
ICH PCIE Voltage.......................[1.50]
DRAM Bus Voltage.......................[1.64]
DRAM DATA REF Voltage on CHA...........[Auto]
DRAM CTRL REF Voltage on CHA...........[Auto]
DRAM DATA REF Voltage on CHB...........[Auto]
DRAM CTRL REF Voltage on CHB...........[Auto]
DRAM DATA REF Voltage on CHC...........[Auto]
DRAM CTRL REF Voltage on CHC...........[Auto]

Load-Line Calibration..................[AUTO]
CPU Differential Amplitude.............[800mV]
CPU Clock Skew.........................[Delay 300ps]
CPU Spread Spectrum....................[Disabled]
IOH Clock Skew.........................[AUTO]
PCIE Spread Spectrum...................[Disabled]

C1E Support............................[Disabled]
Hardware Prefetcher....................[Enabled]
Adjacent Cache Line Prefetch...........[Enabled]
Intel(r) Virtualization Tech...........[Disabled]
CPU TM Function........................[Disabled]
Execute Disable Bit....................[Enabled]
Intel(r) HT Technology.................[Enabled]
Active Processor Cores.................[All]
A20M...................................[Disabled]
Intel(r) SpeedStep(tm) Tech............[Disabled]
Intel(r) C-STATE Tech..................[Disabled]

1st Information: 8-8-8-24-7-98-15-9-28-0
DRAM CAS# Latency......................[8 DRAM Clock]
DRAM RAS# to CAS# Delay................[8 DRAM Clock]
DRAM RAS# PRE Time.....................[8 DRAM Clock]
DRAM RAS# ACT Time.....................[24 DRAM Clock]
DRAM RAS# to RAS# Delay................[Auto]
DRAM REF Cycle Time....................[Auto]
DRAM WRITE Recovery Time...............[Auto]
DRAM READ to PRE Time..................[Auto]
DRAM FOUR ACT WIN Time.................[Auto]
DRAM Back-To-Back CAS# Delay...........[Auto]

2nd Information: 2N-59-60-62
DRAM Timing Mode.......................[2N]
DRAM Round Trip Latency on CHA.........[Auto]
DRAM Round Trip Latency on CHB.........[Auto]
DRAM Round Trip Latency on CHC.........[Auto]

3rd Information: 7-7-19-9-9-9-7-6-4-7-7-4
DRAM WRITE To READ Delay (DD)..........[Auto]
DRAM WRITE To READ Delay (DR)..........[Auto]
DRAM WRITE To READ Delay (SR)..........[Auto]
DRAM READ To WRITE Delay (DD)..........[Auto]
DRAM READ To WRITE Delay (DR)..........[Auto]
DRAM READ To WRITE Delay (SR)..........[Auto]
DRAM READ To READ Delay (DD)...........[Auto]
DRAM READ To READ Delay (DR)...........[Auto]
DRAM READ To READ Delay (SR)...........[Auto]
DRAM WRITE to WRITE Delay (DD).........[Auto]
DRAM WRITE to WRITE Delay (DR).........[Auto]
DRAM WRITE to WRITE Delay (SR).........[Auto]