- Joined
- Sep 29, 2004
Copied from the Inquirer. I know it specifies GPU's, but how much longer to move the CPU's to this also.... I find it a bit odd considering TSMC can't even meet demand on their 28nm process node.
Globalfoundries looks to Mentor Graphics for 20nm fill techniques
20nm silicon expected in 2H 2012
By Lawrence Latif
Tue May 29 2012, 15:39
WAFER BAKER Globalfoundries will collaborate with Mentor Graphics on its upcoming 20nm process node.
globalfoundriesMentor Graphics works on the hardware and software that ends up in fabs and the Smartfill technology in its Calibre Yieldenhancer will be used by Globalfoundries for fill techniques in its 20nm process node. According to Mentor Graphics, its Calibre Yieldenhancer will help Globalfoundries hit integrated circuit fill constraints in a single pass, and that should reduce tape-out time.
Maq Mannan, director of PDK development at Globalfoundries said, "At 20nm the fill strategy becomes much more sophisticated because it's no longer just about planarity. Besides CMP-ECD [chemical mechanical planarisation or polishing - electron capture dissociation] issues, you have to consider a whole range of interrelated effects, such as etch, lithography, stress, rapid thermal annealing (RTA) and other issues essential to successful manufacturing. Calibre's integrated fill analysis and cell-based approach makes fill more precise, while achieving target runtime and output file size."
Mentor Graphics claims its Calibre Yieldenchancer can be integrated into existing design processes. The firm's Smartfill product allows chip designers to define a set of critical nets that require attention during the fill procedure.
Globalfoundries and Mentor Graphics have been working together for some time and Globalfoundries is busy preparing its 20nm process node, which increases requirements for circuit fill techniques. According to Mentor Graphics, Globalfoundries will start delivering 20nm silicon in the second half of this year. µ
Globalfoundries looks to Mentor Graphics for 20nm fill techniques
20nm silicon expected in 2H 2012
By Lawrence Latif
Tue May 29 2012, 15:39
WAFER BAKER Globalfoundries will collaborate with Mentor Graphics on its upcoming 20nm process node.
globalfoundriesMentor Graphics works on the hardware and software that ends up in fabs and the Smartfill technology in its Calibre Yieldenhancer will be used by Globalfoundries for fill techniques in its 20nm process node. According to Mentor Graphics, its Calibre Yieldenhancer will help Globalfoundries hit integrated circuit fill constraints in a single pass, and that should reduce tape-out time.
Maq Mannan, director of PDK development at Globalfoundries said, "At 20nm the fill strategy becomes much more sophisticated because it's no longer just about planarity. Besides CMP-ECD [chemical mechanical planarisation or polishing - electron capture dissociation] issues, you have to consider a whole range of interrelated effects, such as etch, lithography, stress, rapid thermal annealing (RTA) and other issues essential to successful manufacturing. Calibre's integrated fill analysis and cell-based approach makes fill more precise, while achieving target runtime and output file size."
Mentor Graphics claims its Calibre Yieldenchancer can be integrated into existing design processes. The firm's Smartfill product allows chip designers to define a set of critical nets that require attention during the fill procedure.
Globalfoundries and Mentor Graphics have been working together for some time and Globalfoundries is busy preparing its 20nm process node, which increases requirements for circuit fill techniques. According to Mentor Graphics, Globalfoundries will start delivering 20nm silicon in the second half of this year. µ