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AMD puts network, chip guru in charge of Opterons

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mjw21a

Member
Joined
Sep 29, 2004
Copied straight from the Register over here. It will be interesting to see if things can be turned around. :)

AMD puts network, chip guru in charge of Opterons

Server CTO departed last December
By Timothy Prickett Morgan

Posted in Servers, 21st June 2012 18:53 GMT

AMD's new CEO Rory Read has been shaking things up in the past couple of months while at the same time settling things down – particularly on the Opteron server chip front. To help accomplish both, he's made a major management move, hiring Suresh Gopalakrishnan to be vice president and general manager of AMD's server business unit.

Read's needs are obvious: With Intel launching a bevy of new Xeon E5 chips and AMD not able to do much until the "Piledriver" family of chips come out late this year or early next, he needs to get everyone to hunker down and start thinking about the future out beyond a year from now.

And so he's handing Gopalakrishnan the reins of the unit that is responsible for Opteron server chips and the related SR family of chipsets – really server control hubs, since so much of the function of a chipset is on the Opteron itself these days.

As general manager of that business, Gopalakrishnan is in charge of research, development, production, sales, and marketing for the Opteron line, and reports to Lisa Su, who is senior vice president and general manager of AMD's Global Business Units.

Su, who was a CTO at Freescale Semiconductor before joining AMD last December [1] and who put in stints at Texas Instruments and IBM Microelectronics before that, was put in charge of server, client, graphics, and game console products, reporting directly to Read.

In the wake of the acquisition of microserver and interconnect upstart SeaMicro back in February [2], AMD made it clear that over the long haul, SeaMicro would be a server-interconnect business, and that it expected to sell the "Freedom" 3D torus interconnect as a building block for servers and get out of the server business itself. AMD kept on SeaMicro's Andy Feldman to be VP and GM of a new Data Center Server Solutions group that was given that task, reporting to Su.

Two weeks ago, AMD formed an Embedded Systems Group [3] charged with identifying markets where the company can carve out some niches and also find new areas where AMD can grow in the embedded space. Arun Iyengar, formerly vice president at field programmable gate array (FPGA) maker Altera, was named general manager of the Embedded Solutions Group, reports to – you guessed it – Su.

AMD is looking to gain some expertise in system interconnects, particularly with Intel now having control of Ethernet (from Fulcrum Microsystems), InfiniBand (from QLogic), and Aries router (from Cray) interconnects.

It's clear that the means of lashing servers together is just as important today as the server processors themselves, but AMD has not forgotten that the server chips are important as well – and Gopalakrishnan is being brought in to make sure that AMD has good designs out beyond Piledriver Opterons and can deliver on whatever its roadmaps promise.

If AMD is ever to woo back the server makers of the world – or help create a new set of server makers or attract the do-it-yourself crowd – then it is going to have to do better than it has done with the past couple of generations of Opteron chips. With Intel having the wafer baking process advantage, AMD cannot just hammer on the price lever all the time and be a growing and profitable company.

What AMD needs to do is innovate at the systems and cluster level in a way that it did back in the early 2000s when it exploited Intel's weaknesses in its 32-bit Xeon and 64-bit Itanium processors and shot the 64-bit "SledgeHammer" Opterons right between the two, absolutely transforming the server chip racket.

Unfortunately for AMD, however, Intel copied AMD's ideas about multicore, point-to-point interconnects, and other innovations, and now has the upper hand as if none of that ever happened. But it did happen, and that means it can happen again if AMD's techies can change the conditions of the test, Kirk-style.

Gopalakrishnan joins AMD from networking upstart Extreme Networks, where he was vice president of engineering. While at Extreme Networks, which is known as a speed demon in the Ethernet switching arena, Gopalakrishnan was also in charge of marketing and product management, and ran a number of different business units since joining the company in October 2009. For nine years prior to that, he was vice president of engineering at Riverstone Networks, a defunct maker of switching gear that was once part of Alcatel-Lucent, and he has similar engineering roles at Cabletron Systems, Ligent, and ZSP Corp in the late 1990s and early 2000s.

Interestingly, way back in the dawn of time, Gopalakrishnan was a hardware scientist at HP's Integrated Circuits Business Division, in charge of PA-RISC workstation chipsets, and between 1994 and 1996 he was an engineering manager at Sun Microsystems, where he worked on aspects of the "Blackbird" UltraSparc-II processor that put Sun on the map in the data center because of its superiority over other RISC chips of the time.

Gopalakrishnan got his PhD in electrical engineering at the University of Idaho and is an adjunct faculty member there, as well as at Santa Clara University.

An interesting side note: Don Newell, an ex-Intel techie who was hired to be AMD's server CTO back in August 2010 [4], actually left AMD back in December 2011 when Read was putting together AMD's new tech and management team. At the moment, Joe Macri, who is CTO for Global Business Units working beside Su, is the acting CTO for the server business unit. Gopalakrishnan will decide how he wants this CTO role handled once he settles in, an AMD spokesperson tells El Reg. ®
 
I hope this makes AMD return to their golden era, the Sledgehammer era...

I'd really want to see AMD taking the performance crown for at least a generation.
 
I don't think they'll get there for at least another two chip generations yet. Steamroller at least
 
I hope this makes AMD return to their golden era, the Sledgehammer era...

I'd really want to see AMD taking the performance crown for at least a generation.

For this to happen, one must assume that Intel will fall asleep again and it is not possible to guess if Intel will do so.
 
^^^ Perhaps. Process shrinks don't seem to be giving the advantage they once did. AMD's best chance of catching up is Intel hitting a wall in regards to silicon process. Whoever moves to never methods will likely win out.... To be perfectly honest, I'd have to put my money on Intel winning that race. They've more money to put into research regarding this.
 
^^^ Perhaps. Process shrinks don't seem to be giving the advantage they once did.

They have got the manufacturing process so small now that there is almost no way for the IHS to bring the heat out to the heatsink without there being hotspots that make removing the heat very very difficult.

Now had the die shrink reduced the voltage required by about 50% instead of on the order of 10 to 13%, then the later hot cpus might have been more friendly.
 
Yes, this puts the emphasis on to efficient use of die real estate and architectural improvements. I have real hope that AMD can make some headway in the next few generations building on BD. It all depends on what Intel can do with their architecture though too. Intels next change if they stick to their tick tock cycle with be a major architecture change.
 
glad people that make news posts can be so unbiased. can you sense the sarcasm? i shouldnt have to point out as to why i made the comment.
 
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