4000+ 939 with 1MB of L2 cache?

shard · Sep 10, 2004

*shard does his usual moron act and falls of the stage wich makes him wake up and smell the silicon*

totaly forgot that!

Petr · Sep 10, 2004

Semprons for s939 will be in Q1 2005 (3200+) and then in Q2 3500+. But those are for OEMs only, the same as now XP-Ms are.

2 @md0Cer: Your theory is wrong because current desktop Semprons use NewCastle core with half cache disabled. It can be the same with Winchester core. Only Mobile Semprons now use Paris core.

There won't be any 90nm s754 desktop parts because that socket doesn't support required current which increased for 90nm parts. 3700+ is final stop.

K4mui · Sep 10, 2004

c627627 said:
They're going to eventually figure out how to scale Winchesters beyond 4000+. This will happen in 2005 and then it'll be on to Socket 900 dual core DDR II 2MB cache Toledo in 2006.

Socket 900...

Petr said:
There won't be any 90nm s754 desktop parts because that socket doesn't support required current which increased for 90nm parts. 3700+ is final stop.

What exactly do you mean is missing in S754's architecture? S754 will be supported as long as there is demand, as Jan Gütter told me (AMD Europe)
And demand meaning mobos, which is of course not yet a hint that there will be S754 A64s but maybe there will be.

Petr · Sep 10, 2004

K4mui said:
What exactly do you mean is missing in S754's architecture? S754 will be supported as long as there is demand, as Jan Gütter told me (AMD Europe)
And demand meaning mobos, which is of course not yet a hint that there will be S754 A64s but maybe there will be.

90nm parts have lower voltage but the same or higher thermal power. This means current has to increase by maybe 10 to 15 Amps. Motherboard has to handle this and current s754 motherboards are not prepared for that. Other important fact is s939 costs the same to produce but has higher performance and higher model number so you have better profit on those that is for AMD this is the (business) future, not s754.

Yes, socket 754 will be supported as long as there is demand. But be honest, do you want A64 3200+ for s754 or s939? Me the second one. Also because there is a possibility dual-core will fit to current s939 boards (the same as s940 boards support dual-core Opterons).

K4mui · Sep 10, 2004

Petr said:
90nm parts have lower voltage but the same or higher thermal power. This means current has to increase by maybe 10 to 15 Amps. Motherboard has to handle this and current s754 motherboards are not prepared for that. Other important fact is s939 costs the same to produce but has higher performance and higher model number so you have better profit on those that is for AMD this is the (business) future, not s754.

Yes, socket 754 will be supported as long as there is demand. But be honest, do you want A64 3200+ for s754 or s939? Me the second one. Also because there is a possibility dual-core will fit to current s939 boards (the same as s940 boards support dual-core Opterons).

Oh, that's news to me, thank you.

Actually, I would chose the 3200+ with non- DCh- interface.
Because this allows not as much overclock as SCh. Anc we all know DCh has nearly no impact on daily applications

dropadrop · Sep 10, 2004

Petr said:
90nm parts have lower voltage but the same or higher thermal power. This means current has to increase by maybe 10 to 15 Amps. Motherboard has to handle this and current s754 motherboards are not prepared for that. Other important fact is s939 costs the same to produce but has higher performance and higher model number so you have better profit on those that is for AMD this is the (business) future, not s754.

Yes, socket 754 will be supported as long as there is demand. But be honest, do you want A64 3200+ for s754 or s939? Me the second one. Also because there is a possibility dual-core will fit to current s939 boards (the same as s940 boards support dual-core Opterons).

I would imagine the higher thermal rating comes from dual-core cpu's that are included in the socket 939 spec.

OC Detective · Sep 10, 2004

Petr said:
Semprons for s939 will be in Q1 2005 (3200+) and then in Q2 3500+. But those are for OEMs only, the same as now XP-Ms are.

2 @md0Cer: Your theory is wrong because current desktop Semprons use NewCastle core with half cache disabled. It can be the same with Winchester core. Only Mobile Semprons now use Paris core.

There won't be any 90nm s754 desktop parts because that socket doesn't support required current which increased for 90nm parts. 3700+ is final stop.

XP-M is the same core as the mobile Sempron - in fact it is seemingly the same cpu just that its PR rating is 200 points higher for the same frequency and L2 cache!

hitechjb1 · Sep 10, 2004

Originally posted by hitechjb1
The August 2004 AMD A64 Publication # 30430 Revision: 3.37 also includes the following,
though these may not be actually running 64-bit (post it here anyway).

1. Mobile AMD Athlon™ XP-M Processor Family 15

New AY part definition, CG revision, socket 754
AHN2800BIX2AY 2800+ 1600 MHz 128 KB L2 1.4 V (F82h)
AHN3000BIX3AY 3000+ 1600 MHz 256 KB L2 1.4 V (F82h)

2. AMD Sempron™ Desktop Processor

AX part definition, CG revision, socket 754
SDA3100AIP3AX 3100+ 1800 MHz 256 KB L2 1.4 V (FC0h)

Interesting observation:
Same AX part definition as NewCastle, but with 256 KB L2 (1/2 L2 disabled ?) and 64-bit disabled

3. Mobile AMD Sempron™ Processor

New AY part definition, CG revision, socket 754
New LA part definition, CG revision, socket 754

SMN2600BIX2AY 2600+ 1600 MHz 128 KB L2 1.4 V (F82h)
SMN2800BIX3AY 2800+ 1600 MHz 256 KB L2 1.4 V (F82h)
SMN3000BIX2AY 3000+ 1800 MHz 128 KB L2 1.4 V (F82h)

SMS2600BOX2LA 2600+ 1600 MHz 128 KB L2 1.22 V (F82h)
SMS2800BOX3LA 2800+ 1600 MHz 256 KB L2 1.22 V (F82h)

AY is a new part definition, CG revision, socket 754
The following CPU's are based on the same core with AY part definition (F82h).

Mobile AMD Athlon™ XP-M Processor Family 15
AHN2800BIX2AY 2800+ 1600 MHz 128 KB L2 1.4 V (F82h)
AHN3000BIX3AY 3000+ 1600 MHz 256 KB L2 1.4 V (F82h)

Mobile AMD Sempron™ Processor
SMN2600BIX2AY 2600+ 1600 MHz 128 KB L2 1.4 V (F82h)
SMN2800BIX3AY 2800+ 1600 MHz 256 KB L2 1.4 V (F82h)

They are not based on NewCastle AX core on which the Sempron desktop 754 256 KB L2 seems to be based (see two post back).

1. What is the difference between these socket 754 CPU's?
- Mobile AMD Athlon™ XP-M Processor Family 15
- Mobile AMD Sempron™ Processor

2. They seem to have same L2 size, same frequency rating, but one step PR rating difference.

Can it be confirmed or otherwise that both of them cannot run 64-bit codes.

The Coolest · Sep 10, 2004

No. Mobile Sempron is based on the Paris core, that physically has 256KB L2, these weird XP-Ms are based on the newcastle cores with 3/4 or 1/2 of he L2 disabled.

hitechjb1 said:
AY is a new part definition, CG revision, socket 754
The following CPU's are based on the same core with AY part definition (F82h).

Mobile AMD Athlon™ XP-M Processor Family 15
AHN2800BIX2AY 2800+ 1600 MHz 128 KB L2 1.4 V (F82h)
AHN3000BIX3AY 3000+ 1600 MHz 256 KB L2 1.4 V (F82h)

Mobile AMD Sempron™ Processor
SMN2600BIX2AY 2600+ 1600 MHz 128 KB L2 1.4 V (F82h)
SMN2800BIX3AY 2800+ 1600 MHz 256 KB L2 1.4 V (F82h)

They are not based on NewCastle AX core on which the Sempron desktop 754 256 KB L2 seems to be based (see two post back).

1. What is the difference between these socket 754 CPU's?
- Mobile AMD Athlon™ XP-M Processor Family 15
- Mobile AMD Sempron™ Processor

2. They seem to have same L2 size, same frequency rating, but one step PR rating difference.

Can it be confirmed or otherwise that both of them cannot run 64-bit codes.

Its been confirmed that the XP-M cannot run 64 bit code. look for the screenshot in the "WTF? (Part II)" thread.

Petr · Sep 10, 2004

The Coolest said:
No. Mobile Sempron is based on the Paris core, that physically has 256KB L2, these weird XP-Ms are based on the newcastle cores with 3/4 or 1/2 of he L2 disabled.

Its been confirmed that the XP-M cannot run 64 bit code. look for the screenshot in the "WTF? (Part II)" thread.

Oficially XP-Ms are CH7-CG cores (256kB L2) but some of them can be DH7-CGs or SH7-CGs or even SH7-C0s. Documentation isn't complete.

Kuroimaho · Sep 11, 2004

OC Detective said:
I wonder if AMD will just do a soft launch of the 90nm 939's, (especially if its just lower frequency ones such as the 3000 and 3200+, with nobody actually knowing until they appear in the channels? Might even appear this month!

Any news when will these S939 3000, 3200 cpus debute ?
I was considering changing my Intel rig to a S754 3200+ but if the rumors are true I would rather wait for the S939 ones.

OC Detective · Sep 11, 2004

Petr said:
Oficially XP-Ms are CH7-CG cores (256kB L2) but some of them can be DH7-CGs or SH7-CGs or even SH7-C0s. Documentation isn't complete.

Soooo presumably that means they can have either the Paris core (is it Paris or Dublin as I thought the Paris was desktop and Dublin was mobile - see attached links?) with 256 KB L2 cache initially and half disabled for the 128KB L2 versions or it can be a Newcastle and has either 1/2 or 3/4 of the L2 cache disabled or a Clawhammer with 3/4 or 7/8 of the cache disabled???!!!!
http://www.xbitlabs.com/misc/picture/?src=/images/news/2003-11/amd_roadmap11_06_03_bg.gif&1=1
http://www.nationmaster.com/encyclopedia/List-of-AMD-microprocessors

Petr · Sep 11, 2004

OC Detective said:
Soooo presumably that means they can have either the Paris core (is it Paris or Dublin as I thought the Paris was desktop and Dublin was mobile - see attached links?) with 256 KB L2 cache initially and half disabled for the 128KB L2 versions or it can be a Newcastle and has either 1/2 or 3/4 of the L2 cache disabled or a Clawhammer with 3/4 or 7/8 of the cache disabled???!!!!
http://www.xbitlabs.com/misc/picture/?src=/images/news/2003-11/amd_roadmap11_06_03_bg.gif&1=1
http://www.nationmaster.com/encyclopedia/List-of-AMD-microprocessors

Names like NewCastle, Dublin ect. are stupid. Those are code names for chips, not for cores. It is the same as with Intel Xeon Nocona that is in fact Prescott core. I prefer to say core names:

SH7 = 130nm, 1MB L2
DH7 = 130nm, 512kB L2
CH7 = 130nm, 256kB L2
SH8 = 90nm, 1MB L2
DH8 = 90nm, 512kB L2
CH8 = 90nm, 256kB L2

As I said there may be the same processors based on different cores. This not only applies to XP-Ms but to A64s too.

OC Detective · Sep 11, 2004

Petr said:
Names like NewCastle, Dublin ect. are stupid. Those are code names for chips, not for cores. It is the same as with Intel Xeon Nocona that is in fact Prescott core. I prefer to say core names:

SH7 = 130nm, 1MB L2
DH7 = 130nm, 512kB L2
CH7 = 130nm, 256kB L2
SH8 = 90nm, 1MB L2
DH8 = 90nm, 512kB L2
CH8 = 90nm, 256kB L2

As I said there may be the same processors based on different cores. This not only applies to XP-Ms but to A64s too.

Agreed - and the proliferation of similar cpus with (dis)similar ratings from AMD can be somewhat confusing even to people who track their product releases closely never mind joe six pack!

hitechjb1 · Sep 11, 2004

From what I know, the SH7 C0/CG, DH7 C0/CG and CH7 C0/CG are considered as part of the revision string, and is not sufficient to identify the actual CPU model/type/core.
E.g.
SH7 CG can be a CG 754 3200+ 1MB L2
SH7 CG can be a CG 939 FX53 1MB L2
SH7 CG can be a CG 940 FX53 1MB L2

It is true that SH7 can be used to identify 130 nm 1 MB L2 (before any disabling)
It is true that DH7 can be used to identify 130 nm 512 KB L2 (before any disabling)

I prefer using the CPUID EAX 32-bit hex string (an AMD CPU specification) which I think is unique (or more unique) to identify the CPU model, type/core, revision, ....
E.g.
F4Ah - SH7 CG 754 3200+ 1MB L2
F7Ah - SH7 CG 939 FX53 1MB L2
F5Ah - SH7 CG 940 FX53 1MB L2

hitechjb1 · Sep 11, 2004

Petr said:
Names like NewCastle, Dublin ect. are stupid. Those are code names for chips, not for cores. It is the same as with Intel Xeon Nocona that is in fact Prescott core. I prefer to say core names:

SH7 = 130nm, 1MB L2
DH7 = 130nm, 512kB L2
CH7 = 130nm, 256kB L2
SH8 = 90nm, 1MB L2
DH8 = 90nm, 512kB L2
CH8 = 90nm, 256kB L2

As I said there may be the same processors based on different cores. This not only applies to XP-Ms but to A64s too.

Some SH7 may have 512 KB L2, correct me if this is not the case.

A SH7 with 512 KB L2
e.g.
3000+: ADA3000AEP4AP 1.5V (SH7 C0 rev, F48h) <- ClawHammer, 512 KB L2, 2.0 GHz, x10 (512 KB L2 "disabled")
3000+: ADA3000AEP4AR 1.5V (SH7 CG rev, F4Ah) <- ClawHammer, 512 KB L2, 2.0 GHz, x10 (512 KB L2 "disabled")

A SH7 with 1 MB L2
e.g.
3000+: AMA3000BEX5AR 1.5V (SH7 CG rev, F4Ah) <- ClawHammer, 1 MB L2, 1.8 GHz, x9

Petr · Sep 11, 2004

hitechjb1 said:
From what I know, the SH7 C0/CG, DH7 C0/CG and CH7 C0/CG are considered as part of the revision string, and is not sufficient to identify the actual CPU model/type/core.
E.g.
SH7 CG can be a CG 754 3200+ 1MB L2
SH7 CG can be a CG 939 FX53 1MB L2
SH7 CG can be a CG 940 FX53 1MB L2

It is true that SH7 can be used to identify 130 nm 1 MB L2
It is true that DH7 can be used to identify 130 nm 512 KB L2

I prefer using the CPUID EAX 32-bit hex string (an AMD CPU specification) which I think is unique (or more unique) to identify the CPU model, type/core, revision, ....
E.g.
F4Ah - SH7 CG 754 3200+ 1MB L2
F7Ah - SH7 CG 939 FX53 1MB L2
F5Ah - SH7 CG 940 FX53 1MB L2

Well, that is true, but... there are tons of CPUID values, for people it is easier to remember SH7, DH7, CH7 ect. And do I need to say there are (non-public) revisions older than SH7-B3 and that CPUID values for DH8-D0 core is also non-public and that most programs will have problems with detecting those?

"Some SH7 may have 512 KB L2, correct me if this is not the case." - it is exactly as you said - the first two are 1MB L2 chips with 512kB L2 disabled.

hitechjb1 · Sep 11, 2004

The CPUID EAX 32-bit hex string (such as F4A, FC0, FF0, F7A, ...) that I referred to is based on the actual AMD technical document specification of a CPU, either public version or non-released version. That hex string is coded into each CPU and would give unique or more unique details about lower level distinction and the internal CPU core on which a CPU model is based.

Such specification exists reqardless how some CPU utility programs such as CPUID, CPU-Z, GCPUID or alike detect them.

Petr · Sep 11, 2004

hitechjb1 said:
The CPUID EAX 32-bit hex string (such as F4A, FC0, FF0, F7A, ...) that I referred to is based on the actual AMD technical document specification of a CPU, either public version or non-released version. That hex string is coded into each CPU and would give unique or more unique details about lower level distinction and the internal CPU core on which a CPU model is based.

Such specification exists reqardless how some CPU utility programs such as CPUID, CPU-Z, GCPUID or alike detect them.

Well... I do MSR programming where CPUID detection is a necessity. As for now, my list holds 24 different CPUID function 1 EAX return values not taking into account 20 different BrandIDs returned by one "classic" function and one extended function. And I haven't yet implemented E revision where there are another maybe 7 different CPUID values.

Such specification gets updated quite often what means programs can have problems with it. And I bet they will.

hitechjb1 · Sep 12, 2004

I can imagine the work to maintain CPU utility programs to identfy the CPUID of CPU, given the so often revisions and various cores coming out over time (as you mentioned about your list has been growing fast).

Apart from maintaining such CPUID programs, the CPUID hex string documented in the AMD tech doc is the very only mean in knowing and identifying the various revisions, cores, ..., to tell whether two different parts/models are coming from the same revision cores.

E.g
Mobile AMD Athlon™ XP-M Processor Family 15
AHN2800BIX2AY 2800+ 1600 MHz 128 KB L2 1.4 V (F82h)
AHN3000BIX3AY 3000+ 1600 MHz 256 KB L2 1.4 V (F82h)

Mobile AMD Sempron™ Processor
SMN2600BIX2AY 2600+ 1600 MHz 128 KB L2 1.4 V (F82h)
SMN2800BIX3AY 2800+ 1600 MHz 256 KB L2 1.4 V (F82h)

These are from the same revision core with CPUID string F82h, for a new core with 256 KB L2. So the 128 KB L2 XP-M Family 15 and 128 KB L2 Sempron are half L2 cache disabled.

4000+ 939 with 1MB of L2 cache?

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