AMD's Secret Weapon

Somebody have something I can read to better understand just how RHT and Core Multiplexing work? I know what they do, have a vague idea of how they do it, but still trying to learn more.

I have to explain it to someone, and all I know is that it works by sending every other instruction to the second core. According to said person, thats not possible.

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There was an interesting tidbit on the main page today. It would appear that Mutliplexing is simply turning of the second core and using it's L2 cache to double the cache of core 1. Now I rather suspect that this will not give the benefits that reverse HyperThreading can. With AMD's approach you still have use of the additional L2 cache, plus the additional core.

Mind you, if Intel can turn off 1 core minus the cache, I rather suspect they'll be able to easily use reverse HT as well. I just can't see that using two cores is harder than turning one off and combining the cache... I can't see why they've done this in the first place actually. Perhaps they're thinking their chip is fast enough already and just want to kick AMD's *** in the power consumption area

power consumption is a big deal now, although i don't understand why it is so big for the high-end/enthusiast side, it should mainly just be a server-side big deal

not that i'm complaining, a lower power bill is nice, but really it's just being offset by 2 vid cards, not to mention quad, + physics, etc....

Honestly I dont know why you guys are poopooing this its a great invention in the way of dual core technology, you're telling me you'd rather leave it up to the C++ programmer to divide his application into multiple threads rather then your CPU?! You've got to be kidding me this is how dual cores should have been done in the first place anyway...

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I couldn't agree more. The software industry is taking baby steps towards SMP capable programs, where the hardware industry jumped right into the fray. There are numerous more single-threaded apps out there than there are multi-threaded, and nobody should fool themselves into thinking that that's going to change anytime soon. Dual-core and SMP benefits, to this day and for many days to come, is the ability to intensively multitask.

I'm all for companies making multi-threaded software. But it just isn't easy, or in some types of software, practical. Having something like this to help use both cores towards improving single-threaded apps is a blessing.

shadin said:

I couldn't agree more. The software industry is taking baby steps towards SMP capable programs, where the hardware industry jumped right into the fray. There are numerous more single-threaded apps out there than there are multi-threaded, and nobody should fool themselves into thinking that that's going to change anytime soon. Dual-core and SMP benefits, to this day and for many days to come, is the ability to intensively multitask.

I'm all for companies making multi-threaded software. But it just isn't easy, or in some types of software, practical. Having something like this to help use both cores towards improving single-threaded apps is a blessing.

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I strongly agree. Doesn't everyone prefer hardware-based acceleration, after all? Besides, I never met a programmer that I liked

Why does so many people think this would not give a good proformance boost, while SLI does? SLI has to connect board to board, this is on the same chip.

Multiplexing has the option of turning off a core (wich new Intel boards already have the abiltiy to do, so why the heck would they need something new to do it ) or having cores that share cache share an instruction (If you read the tidbit more carefully) more like this RHT. If either pan out.

well, i think Chip at TheInquirer is more on target with Intel's 'core multi-plexing'
http://www.theinquirer.net/default.aspx?article=32747

TheInquirer said:

So what could it be if it’s not a reverse HT technology? My personal theory (and it is just that) is that one possibility is that it is something developed for Merom as a way of reducing the hotspots on the chip that you would get when running in single core mode, for example when on battery, and that it is not a performance-enhanced mode targeted at the desktop people.

The operating system would see just one processor, but code execution would switch between one core and the other, in order to keep the temperatures down.

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nothing like RHT, simpler...but again, all speculation..

WHY!!! LOL
you can turn off a core in the bios..
Reduce hotspots??? those things dont get hot at stock speeds

WOW.. thats some wild speculation

yeah, i don't exactly get it either, but it has some merit

i think he makes it out a bit more complicated than it needs to be, in that, i think the pc just cuts one core, kind of like they cut the clock now, i don't think it's all about heat distribution, i think it's pure clocking down

and yes, you can disable a core now, but when u disable it, that's it, it's disabled, i think the point to 'core multi-plexing' is to allow the pc to do it automatically, on and off

Looks like The Inquirer writer missed what's happening too. Shutting down a core releases its micro instruction execution unit and mathco(s) for use by the other processor. The OS can no longer see it and will not assign theads to it. Thus that core is acting as "Hyperthreading" on Intel. The difference is that unlike HT the slave core still has it's own cache filled by the master core. Intel is using L1 cache-cache connections similar to AMDs HTT. The difference is AMDs HTT is at the L2 cache level. For a little update on what L1 and L2 cache ( and notice the sizes of AMD vs Intel, diiff strategies). L2 is the holding area of requested blocks of memory needed by the processor in the near future as determined by the instruction pre-fetch que ( processors predicate or determine in advance what they might need next). When the processor at some point the cache manager loads the data into one cache and the execution code into the other (Harvard Technology, split data and code caches). This is why Intel cross connected these caches at L1. L0 is hypothetical but exists on the core itself but refered to as instruction pipes which are basicly queues. I'm still waiting on that tidbit as to what AMD is up to but I think it may work at the L2 cache allowing both processors to work in tandem as oppesed to Master-Slave. What I mean by tandem is that both proccessors work on their own chunks of code but split at the L2 eliminating that extra trip to L1. If this hold true then AMD might have a slight edge but we won't know until we see results.

BTW Misfit, you've been meeting programmers, thats your problem, your should be talking to Software Developers.
edit: shpellig

I don't see alot of use (personally) for a technology such as this. You have to turn it on in bios, essentially making your dualcore processor a singlecore one (untill reboot).

sux

dropadrop said:

I don't see alot of use (personally) for a technology such as this. You have to turn it on in bios, essentially making your dualcore processor a singlecore one (untill reboot).

sux

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that's what you can do now, 'core-multiplexing' would be able to enable/disable it depending on processor power needed, kind of like how it down-clocks now, again, speculation

Maby... Though that would allready take quite alot of logic from the operating system would'nt it? Turning the feature on in bios so the processor is shown to the os as 1 seems alot more probable...

What you can do now (without booting) is set affinity, or with booting possibly disable a core. My point was, that I don't have use for something I have to reboot to turn on or off, I'm not the benchmarking type of guy. I also do alot of multitasking, and most of my applications support smp (the ones needing power anyway).

To me this sounds like a gimmick to get longer bars in hardware tests. Ofcourse I do recognise that there are people who only use the computers for gaming (as an example) and might prefere to switch a feature like this on (so they get 205fps instead of 198fps).

I think your comparing it to Speedstep.
I still dont understand why its possible for AMD to have RHT and Intel goes off making another feature for redusing power on a chip that uses 35-65Watts (depending on model) It just doesn't make sence to me..
AlabamaCajun seems to be explaining it in a way that makes more sence to me

When I look at Intels flowchart it clearly looks like it's splitting instructions up to be executed by all cores, not turning off cores when needed. On the other hand I understand very well what use could come from further reducing power on a core that "only" uses 35W of power.

I think most people who use their notebooks for their intended purpose would'nt mind 30-45 minutes of extra batterylife if they could have it. I often sit on a plane or train and do something like typing a word document or read pdf's, something which I could do with a 400mhz P3 just as easily as I can do it with a core duo.



IMO this image clearly points (sorry, don't know the original source) that the core can operate in three modes, dualcore, multiplexed dualcore or singlecore (for powersaving). In other words it should be just as smart as the AMD one (which ofcourse say's nothing about which one performs better).

For me the big question is the logic behind this. Do you have to reboot to turn the feature on, or does it happen automatically "on need" basis.

edit:

aparently it's a user-created image, so it might not have base on facts.

That's what Memon is for
Conroe isn't a mobile chip

Yea.. FCG did make that REALLY official looking

I would be very surpised if either AMD introduce a CPU that shares execution units between cores in their current generation (not so surprised though if Intel does it ... see below) . Currently, the "join point" of a CPU is waaaaay forward of the execution units (SRQ in the case of the K8 which joins in front of the L2, and in front of the L1 in the case of the Core 2). To re-engineer a core to be able to share execution units (and consequentally register files, schedulers, load/store units, branch predictors, etc etc) would be a massive undertaking. And then you'd end up with two "cores" that would be so tightly intertwined it'd be indistinguishable from a single core with twice the execution units and hyperthreading.

Certainly, it's not the sort of thing you'd expect in an AM2 CPU as that was supposedly little more than a die shrink and change of the bolted-on memory controller. In fact, it's something I'd much more expect from Intel, with their existing hyperthreading stuff.

In any case, it's not what Intel is claiming their "core multiplexing" does, assuming the following article is an accurate representation of what they are doing:
http://www.intel.com/technology/magazine/research/speculative-threading-1205.htm
Here the splitting is slightly further back than the existing splitting (either before or at the decoders) but much further forward than a sharing of the execution units.

The key words in this report are "relies on both hardware and software (compiler) support to work". This isn't going to speed up existing applications. They will at least require a rebuild with a supporting compiler, and probably a decent bit of tweaking to get good performance. Essentially, it makes the problem of automated (compile-time) parallelism identification easier by allowing the compiler to say "this *may* be parallelisable, but you the CPU better check at run-time". Certainly something nice, but it's far from a silver bullet.

greenmaji said:

That's what Memon is for
Conroe isn't a mobile chip

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Well, again I guess I'm differant from most of us here. I used to run my X2 at 1.2v or it would not run cool enough to keep the computer silent (enough).

dropadrop said:

Well, again I guess I'm differant from most of us here. I used to run my X2 at 1.2v or it would not run cool enough to keep the computer silent (enough).

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Hmmmm, I can understand your obsession with silence... I've been there too... Then decided to try my hand with overclocking my trusty old XP 2500+, pushed it to 2.7GHz on air with a TT PIPE101 heatsink with 80CFM fan.... Thing is, I could hear it outside the house. I went from that to my current Zalman, which sucks for overclocking but it is quiet.

Likewise, all case fans are undervolted.

Besides, with what I use my computer for these days, I can't tell the difference between overclocked and stock. The video card and RAM makes a bigger difference.

Secret weapon released?
http://www.theinquirer.net/default.aspx?article=32790