# Thread: Dies (Dice), Wafers, and Costs

1. ## Dies (Dice), Wafers, and Costs

I became curious about this in another thread, so I did some research and made some enquiries. The other discussion kind of died off but I'll post it here in case anybody else finds it interesting, or has any comments (or corrections).

I'm sure that the data is not 100% correct (as nobody releases real numbers) but I think it gives an idea of how much it costs to make a chip.

Wafer costs are for finished wafers but do not include R&D, marketing, fab construction, tooling, or other overhead costs.

Assuming:

0.002 Defects per mm^2
\$4900 per 300mm CMOS Wafer
\$5300 per 300mm SOI Wafer
\$2700 per 200mm SOI Wafer
alpha of 1
Dies Per Wafer = {[pi * (Wafer Diameter/2) ^ 2] / Die Area} - {[pi * Wafer Diameter] / (2 * Die Area) ^ 1/2}
Yield = (1 + [Defects per Area * Die Area / alpha]) ^ (-alpha)
\$10 burning, binning and packaging cost for single die chips
\$15 burning, binning and packaging cost for dual die chips

AMD Agena (9XXX):
65nm, 300mm Wafer
285 mm^2 Die
= 203 Dies per Wafer
= 63.69% Yield
= 129 Usable Dies per Wafer
= \$41.09 per Die
= \$51.09 per Chip

intel Yorkfield (2x 6MB) (Q9XXX):
45nm, 300mm Wafer
2x 107 mm^2 Dies
= 2x 290 Dies per Wafer
= 82.37% Yield
= 2x 238 Usable Dies per Wafer
= \$20.52 per 2x Die
= \$35.52 per Chip

intel Kentsfield (2x 4MB) (Q6XXX):
65nm, 300mm Wafer
2x 143 mm^2 Dies
= 2x 213 Dies per Wafer
= 77.76% Yield
= 2x 165 Usable Dies per Wafer
= \$29.56 per 2x Die
= \$44.56 per Chip

Tris:

AMD Agena (8XXX):
65nm, 300mm Wafer
285 mm^2 Die
= 203 Dies per Wafer
= ~68.68% Yield
= ~139 Usable Dies per Wafer (of which ~133 could be sold as quads)
= ~\$38.13 per Die
= ~\$48.13 per Chip

High-End:

AMD Kuma (7XXX):
65nm, 300mm Wafer
~150 mm^2 Die
= ~405 Dies per Wafer
= ~76.92% Yield
= ~312 Usable Dies per Wafer
= ~\$17.01 per Die
= ~\$27.01 per Chip

AMD Windsor (X2+):
90nm, 200mm Wafer
219 mm^2 Die
= 113 Dies per Wafer
= 69.54% Yield
= 79 Usable Dies per Wafer
= \$35.83 per Die
= \$45.83 per Chip

intel Wolfdale (6MB) (E8XXX):
45nm, 300mm Wafer
107 mm^2 Die
= 580 Dies per Wafer
= 82.37% Yield
= 477 Usable Dies per Wafer
= \$10.26 per Die
= \$20.26 per Chip

intel Conroe (4MB) (E6XXX):
65nm, 300mm Wafer
143 mm^2 Die
= 426 Dies per Wafer
= 77.76% Yield
= 331 Usable Dies per Wafer
= \$14.78 per Die
= \$24.78 per Chip

Mid-Range:

AMD Brisbane (X2+):
65nm, 300mm Wafer
126 mm^2 Die
= 488 Dies per Wafer
= 79.87% Yield
= 389 Usable Dies per Wafer
= \$13.61 per Die
= \$23.61 per Chip

intel "Ridgefield" (3MB) (E7XXX):
45nm, 300mm Wafer
~83 mm^2 Die
= ~757 Dies per Wafer
= ~85.76% Yield
= ~649 Usable Dies per Wafer
= ~\$7.55 per Die
= ~\$17.55 per Chip

intel Alendale (2MB) (E4XXX):
65nm, 300mm Wafer
111 mm^2 Die
= 558 Dies per Wafer
= 81.83% Yield
= 456 Usable Dies per Wafer
= \$10.74 per Die
= \$20.74 per Chip

Low-End:

AMD Manilla (Sempron):
90nm, 200mm Wafer
126 mm^2 Die
= 201 Dies per Wafer
= 79.87% Yield
= 160 Usable Dies per Wafer
= \$16.85 per Die
= \$26.12 per Chip

intel Conroe-L (4XX):
65nm, 300mm Wafer
90 mm^2 Die
= 715 Dies per Wafer
= 84.75.76% Yield
= 606 Usable Dies per Wafer
= \$8.32 per Die
= \$18.32 per Chip

2. That's rather interesting. If those numbers are even remotely accurate, Intel is able to produce siginificantly more per wafer. Some can be made up from possible cheaper R&D, tooling, and other costs involved, but where it's really at is the efficiency of creating your end product and bringing it to market.

...or my 2 cents anyways.

3. It'd be cool to go on a tour of a FAB to see them being made.

Wow I'm a loser =D

4. I would think the R&D plus fab costs would add a pretty significant amount to the cost.

5. Yup, IIRC intel has already spent US\$7.5bn converting and building 45nm fabs alone.

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