e8600 Slower than e8500???

wingman99 said:

SB are you referring to the south bridge and what is happening.

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Uh Um....(clear throat in preparation for sounding silly) Ok, so it wasn't the SB...it was a bad cable....

As long as I have been doing this stuff, and I still do foolish things, like ordering another mobo before figuring out a problem....

unclewebb said:

I just made some changes to the XS Bench in RealTemp 2.77. It uses 2MB of memory now which will fit inside and target the L2 cache. Maybe it can be used to detect this L2 cache latency issue that you guys are seeing.

http://www.fileden.com/files/2008/3/3/1794507/RealTempBeta.zip

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I Tested with speed step off 800mhz memory speed 5-5-5-15 memory timing 3.0 ghz CO stepping.

Thanks for the tests fellas, just come across this... but you still haven't resolved this issue and we're waiting.

On Intel platforms, MB MFGs have long tweaked the MCH tighter or looser as per offering oc abilities. For whatever reason, this doesn't just affect MEM access figures. Any direct CPU latency comparison between two different CPU and MB models will not be immediately valid due to this reason. Unless you can do the following...
You have to, at the very least for comparison reasons, keep the settings seen in MEMSET all the same on the same OS, using the same speeds/timings/multipliers and then bench using the same benchmark version - minimal differences and removes all doubt. Bandwidth and hence latency is not just a function of L1/L2 cache access rates by some of these apps, if it was, they wouldn't differ in their calculation results with such variance.

I'm curios to see L1/L2 access numbers. Sandra, CPU-Z Latency and Everest are conclusive and accurate enough if you can keep additional factors fixed. wPrime is another consistent and good application to check on a CPU's underlying potential, far superior to the inconsistent SPi/3DM. Gaming would make an appropriate topping.

The Sandra test was well done and the first thing that had me piqued apart from this part - if you can run them keeping all latency and bandwidth affecting factors constant, then you'll have good enough reason to make a conclusion. As of yet, its still up in the air.

jason4207 said:

Can you show proof of this? I find it hard to believe.

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Its not possible under Windows. The difference between the 3G 9850 to a 3.85G Q6600 is roughly clock linear in 3DM'06 CPU since they are very close per clock cycle in it. If you keep the NB on the K10 stock and tRD normal, it'll trail about 100 points per clock (apart from in x64). If you tighten K10 tRD and NB, it comes on par to a few ahead per clock even at 6x 400FSB PL4.

I'm just trying to compare L2 cache latency and bandwidth to try and find out if there is any difference between E0 and C0.
Here's my C0.



If anyone could post a similar screen shot at the same MHz and memory timings, that would be great.

This review seems to show that there is virtually no difference in many benchmarks.
http://www.xcpus.com/GetDoc.aspx?doc=49&page=1

change you ram to 5-5-5-15 and I will do it

Post up memset as well, so you can make sure all your timings are the same. Especially Performance Level.

Ill have an E8600 in a few days.Ill do it when i get mine

I found a guy on the P5B forum with an E8500 - E0 to compare to. We set both our processors to 500 x 8.5 ~ 4250 MHz and used the same CL4-4-4 timings at 500 MHz / DDR2-1000. Here's our results:

http://www.xtremesystems.org/forums/showpost.php?p=3321435&postcount=4909
http://www.xtremesystems.org/forums/showpost.php?p=3321473&postcount=4910

We did not see any real world difference in L2 cache bandwidth between his E0 and my C0 on the same board with very similar settings.

||Console||: Hello from Cochrane, AB Your memory timings shouldn't effect L2 bandwidth but I'll give it a try at 500x8 with CL5 timings.

Jason4207: On my P5B with the old P965 chipset, Performance Level in MemSet doesn't change anything. You can move most of the other sub timings around without any real change in memory bandwidth or L2 bandwidth beyond the normal variation from one run to the next.

Edit: Here is a good review comparing C0 to E0 and they couldn't find any real world difference in a variety of benchmarks when both were at the same frequency.
http://www.xcpus.com/GetDoc.aspx?doc=49&page=1

Got my E8600 E0 today i still have to install it.But i should have it in tonight or tomorrow.Then i can try some bench marks to compare

unclewebb said:

I found a guy on the P5B forum with an E8500 - E0 to compare to. We set both our processors to 500 x 8.5 ~ 4250 MHz and used the same CL4-4-4 timings at 500 MHz / DDR2-1000. Here's our results:

http://www.xtremesystems.org/forums/showpost.php?p=3321435&postcount=4909
http://www.xtremesystems.org/forums/showpost.php?p=3321473&postcount=4910

We did not see any real world difference in L2 cache bandwidth between his E0 and my C0 on the same board with very similar settings.

||Console||: Hello from Cochrane, AB Your memory timings shouldn't effect L2 bandwidth but I'll give it a try at 500x8 with CL5 timings.

Jason4207: On my P5B with the old P965 chipset, Performance Level in MemSet doesn't change anything. You can move most of the other sub timings around without any real change in memory bandwidth or L2 bandwidth beyond the normal variation from one run to the next.

Edit: Here is a good review comparing C0 to E0 and they couldn't find any real world difference in a variety of benchmarks when both were at the same frequency.
http://www.xcpus.com/GetDoc.aspx?doc=49&page=1

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Nice then I guess I really dont need to run the test =) they are so close.

If I had my first set of balistix i could have done 4-4-4-12 @ 500 but not with this new crap I got back from RMA .


Web let me guess you shop @ memoryexpress =)

Ok what benchmarks do i need?

||Console|| said:

Web let me guess you shop @ memoryexpress =)

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Hmmm, maybe once or twice. I also like NCIX out of Vancouver just because it saves me a drive to Calgary. I got some OCZ PC2-9200 Reapers from NCIX recently for $60 that run pretty good. If I ever get my $25 rebate then I'll really be smiling but OCZ's rebate reputation is not quite money in the bank.

I have some time at the moment to go and run ScienceMark 2.0 MemBench at 500x8 with CL5 timings. If you can do the same Console or Gigabit, that would be great. Just show us the L2 latency tab.

http://www.techpowerup.com/downloads/170/

I'm not sure why Vantage was showing a difference between C0 and E0. I originally thought that maybe on chip cache latency had changed with the switch to E0 but I haven't found any difference between the two chips.

Edit: There's no difference in L2 cache performance whether you run your memory at CL4 or CL5.

Thanks for the details. Waiting for the last results.

cchilb and unclewebb's RAM/MCH are not the same perf. at all - cchilb are quite a bit slower and its obvious. To keep it accurate, they have to be kept uniform.

Secondly, CAS has lower perf. effect on RAM than tRD does with Intel chipsets; a well known and documented setting: http://www.anandtech.com/mb/showdoc.aspx?i=3208&p=7

The above document also shows very clearly how Read Delay will affect MEM and L2 performances with C0 Yorky, X48 and DDR2. Its a well known settings for a long while with benchers. Every board has different perf. levels with the same settings so there will always be slight variances.

Alright he is my frist run 8x500 ram at 500 5-5-5-15.No tweaking on the sub timings just the way evga 780i set them




By mothow

sorry to bump this old thread, but what is the final verdict? Seems like E0's L2 cache is about 2 cycles slower, how does it impact gaming performance?

Bumpers. Read the whole thread and was hoping for updates.

I know your problem and have solved it. Here you go, enjoy:
http://www.hardwarecanucks.com/foru...hand-vista-service-pack-1-vs-your-phenom.html
This problem is relevant for X3 CPUs AS WELL, so use that solution and also it is the same on windows 7.