Is this why Ryzen is having problems with higher RAM frequencies?

Woomack · Apr 12, 2017

wingman99 said:
Serial presence detect (SPD) is a standardized way to automatically access information about a memory module. Earlier 72-pin SIMMs included five pins that provided five bits of parallel presence detect (PPD) data, but the 168-pin DIMM standard changed to a serial presence detect to encode much more information.

SPD is specified by JEDEC. SPD holds all the memory data including JEDEC timings, subtimings and MXP timings, subtimings. When the PC boots up the BIOS access all the SPD memory data it needs, including XMP data, if Bios is set to use that data.

JEDEC (Joint Electron Device Engineering Council)
SPD (serial presence detect), it is all the memory data in a chip on the memory stick.
XMP A similar, Intel-developed JEDEC SPD extension. This uses bytes 176–255, which are unallocated by JEDEC, to encode higher-performance memory timings
https://en.wikipedia.org/wiki/Serial_presence_detect#XMP

Woomack where do you acquire your information from? Links please.

If I search for data then I browse manufacturers documents or I ask them directly. Wiki is popular base of knowledge but also open to all users who can add what they want. There are things which affect only described generation while all is changing each year and not always is updated. JEDEC is publishing their documents with full description on their website so it's not hard to find it.
A lot of what I say is based on my experience and tests which I performed over the years.
I'm not sure if you know that table with timings which you pasted is describing ~12 timings available in memory profiles which are editable. From that 5 are main timings and CR range is forced by the platform.
Maybe I said it wrong but SPD has some kind of timing table, XMP is extension to that table visible as additional profile. SPD is from what motherboard take info about memory and sets auto timings and in most cases ( but not all ) is compatible with JEDEC, XMP is what is forced by profile but includes only main timings and couple of additional settings ( in total up to about 12-13 ).

ronss · Apr 12, 2017

so,,,if i use 2 sticks of memory(2x8).....3200 is okay?

- - - Updated - - -

hi....so i use 2 sticks (2x8)...3200 is okay?

Johan45 · Apr 12, 2017

That depends on the IC insice the sticks. Samsung is much friendlier than Hynix at the moment but that is changing. But yes 2x8 is better than 2x16 or 4x8

wingman99 · Apr 12, 2017

Woomack said:
If I search for data then I browse manufacturers documents or I ask them directly. Wiki is popular base of knowledge but also open to all users who can add what they want. There are things which affect only described generation while all is changing each year and not always is updated. JEDEC is publishing their documents with full description on their website so it's not hard to find it.
A lot of what I say is based on my experience and tests which I performed over the years.
I'm not sure if you know that table with timings which you pasted is describing ~12 timings available in memory profiles which are editable. From that 5 are main timings and CR range is forced by the platform.
Maybe I said it wrong but SPD has some kind of timing table, XMP is extension to that table visible as additional profile. SPD is from what motherboard take info about memory and sets auto timings and in most cases ( but not all ) is compatible with JEDEC, XMP is what is forced by profile but includes only main timings and couple of additional settings ( in total up to about 12-13 ).

When I select XMP my memory changes a lot of the subtimings, just like the XMP profile I posted.

Woomack · Apr 13, 2017

Grab some higher ASUS ROG or ASRock OCF board and you will see that XMP is affecting only couple of first timings and loooong list of other timings are affected by internal tables ( which you can't see in any profile ). Additional timings are changing depends on memory frequency or additional settings like 'maximus tweak' option is changing most of the sub timings.
Simply when you change profile to XMP then memory frequency goes up. XMP is affecting ~10-13 timings and everything else is changing because memory frequency went up ( it was affected by SPD/motherboard preferences ). XMP profile is 'suggesting' motherboard how it should act at higher memory frequency but XMP is not forcing additional timings.
When you set everything at auto and bump only memory frequency then all memory timings will also change ( or at least should change ) and you will see something closer to JEDEC specs ( there is limit of that ).

Going back on track, if there are issues with memory on Ryzen then XMP/DOCP profile is "suggesting" settings which motherboard can't translate to stable settings. If I'm right then it's happening more often with higher frequency memory kits. Personally I had no issues with 2666-3200 memory kits.

Bluefalcon13 · Apr 13, 2017

Woomack, if I end up getting a different kit of ram, I may just mail you the Aegis kit to play with a bit. See if you have the same issues I do on Ryzen, plus it sounds like you could check em in an Intel system as well. We are talking months here, but I really think it has to do with either the sub timings or DOCP having the issue you just mentioned.

Bottom line, I don't recommend the Aegis kit for Ryzen ATM. Maybe this will change with the RAM update microcode. We shall see in May.

Woomack · Apr 13, 2017

I don't know what is in new Aegis kits. Run Thaiphoon Burner and make screenshot of SPD/IC info window ( Read SPD button ) - http://www.softnology.biz/files.html
It will show used memory chips and timing/profile list. Full/paid version lets to change profiles or add your own XMP profiles but I'm not sure if you can program it on Ryzen. On last Intel chipsets were some issues because of locked SPD.

wingman99 · Apr 13, 2017

Woomack said:
Grab some higher ASUS ROG or ASRock OCF board and you will see that XMP is affecting only couple of first timings and loooong list of other timings are affected by internal tables ( which you can't see in any profile ). Additional timings are changing depends on memory frequency or additional settings like 'maximus tweak' option is changing most of the sub timings.
Simply when you change profile to XMP then memory frequency goes up. XMP is affecting ~10-13 timings and everything else is changing because memory frequency went up ( it was affected by SPD/motherboard preferences ). XMP profile is 'suggesting' motherboard how it should act at higher memory frequency but XMP is not forcing additional timings.
When you set everything at auto and bump only memory frequency then all memory timings will also change ( or at least should change ) and you will see something closer to JEDEC specs ( there is limit of that ).

Going back on track, if there are issues with memory on Ryzen then XMP/DOCP profile is "suggesting" settings which motherboard can't translate to stable settings. If I'm right then it's happening more often with higher frequency memory kits. Personally I had no issues with 2666-3200 memory kits.

When looking at IMC timings I can see that XMP changes some sub timings from JEDEC and what the motherboard sets.

JEDEC__________________2133, 15-15-15-36-50-17-13-4-6-4-9-4-6-374-8-23-2
XMP off, manual multiplier_3000, 15-15-15-36-50-21-19-4-6-4-9-4-7-374-10-23-2
XMP on, manual multiplier_3000, 14-14-14-34-48-17-13-6-7-4-9-4-7-560-8-23-2
XMP auto _______________3200, 14-14-14-34-48-25-12-6-7-4-9-4-7-560-12-39-2

LRG5 · Apr 14, 2017

Running Ryzen7 1700x at stock setting (3700MHZ) and ram at 3200MHZ 15,16,16,34 with a latency of 63.65ns is this good for a 24/7 memory setting or is it a little tight.

freeagent · Apr 14, 2017

LRG5 said:
Running Ryzen7 1700x at stock setting (3700MHZ) and ram at 3200MHZ 15,16,16,34 with a latency of 63.65ns is this good for a 24/7 memory setting or is it a little tight.

Seems a tad loose? :shrug:

Apples to oranges I suppose

LRG5 · Apr 16, 2017

I think the updates in the Microcode is going to help. Can wait for the next bios up date.

Johan45 · Apr 16, 2017

freeagent said:
Seems a tad loose?

Apples to oranges I suppose

View attachment 190269

The latency on ryzen isn't the best but it still has pretty good bandwidth. I think it's likely my CPU IMC I tried for 3800+ from all different angles and it wasn't gonna happen but managed 3744 fairly stable. Stable enough for X265 4K which is highly demanding.

LRG5 · Apr 16, 2017

Nice run Johan45, I like the way you drop the multiplier and boosted bus speed, I'm waiting on the Bios update for Prime x370 (No adjustment for the bus in the bios ). IF they do not add one on the next Bios update I be switching MB.

Bluefalcon13 · Apr 16, 2017

LRG5 said:
Nice run Johan45, I like the way you drop the multiplier and boosted bus speed, I'm waiting on the Bios update for Prime x370 (No adjustment for the bus in the bios ). IF they do not add one on the next Bios update I be switching MB.

They won't be. There is no external clockgen on the Prime.

LRG5 · Apr 16, 2017

there's a Ctlk for Cpu, bus and Pci same as the crosshair, but no adjustment.

Bluefalcon13 · Apr 16, 2017

LRG5 said:
there's a Ctlk for Cpu, bus and Pci same as the crosshair, but no adjustment.

So, considering all the CPUs this board supports, what are the chances that the A10 CPUs based on the FX cores that this board also supports enables those options in bios (via inserting the proper CPU)? Ryzen does not natively support base clock modifications, then would need an external clockgen to do so. If you are waiting on base clock adjustments, I'd say stop waiting, and start saving for the C6H.

freeagent · Apr 16, 2017

Johan45 said:
The latency on ryzen isn't the best but it still has pretty good bandwidth. I think it's likely my CPU IMC I tried for 3800+ from all different angles and it wasn't gonna happen but managed 3744 fairly stable. Stable enough for X265 4K which is highly demanding.
View attachment 190315
View attachment 190316

Glad to see AMD is back :thup:

Johan45 · Apr 16, 2017

I have to go with falcon, at least at present any board that has adjustments AFIK have an external generator like the taichi and K7. I don't know if that's something that can be done using AGESA and BIOS. I think it's going to be similar to haswell where the BCLK is too tied to other busses and will only cause corruption. Even with the external gen on the CHVI the PCIe downgrades automatically because of the BCLK speed the help prevent SSD/NVMe corruption. It could be a physical limitation of the CPU design. This does have me curious about the APU. Only one CCx and a GPU It'll have to have a different design which could open up many possibilities. Imagine an 4c/8t APU that'll clock 10-15% higher than an R7 say 4.5 ish easily. Then Intel would have something to be nervous about. Even with any Ram issues it'll still go toe to toe with a 7700 if priced right that'll be serious competition even in the OEM market

- - - Updated - - -

freeagent said:
Glad to see AMD is back

View attachment 190317

It' a ton better than it used to be for sure here's my FX for comparison even the cache speed on Ryzen is smoking when compared

Bluefalcon13 · Apr 16, 2017

I was talking about the current OEM only APUs that are AM4 socket. They run a dozer based architecture with DDR4.

Johan45 · Apr 16, 2017

Right I was talking next gen APU based on zepplin

Is this why Ryzen is having problems with higher RAM frequencies?

Benching Team Leader

Registered

Benching Team Leader Super Moderator

Member

Benching Team Leader

Member

Benching Team Leader

Member

Member

Member

Member

Benching Team Leader Super Moderator

Member

Member

Member

Member

Member

Benching Team Leader Super Moderator

Member

Benching Team Leader Super Moderator

Similar threads