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Maximum theoretical clock speeds

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QBobWatson

Member
Joined
Feb 8, 2009
Location
Atlanta, GA
I did a naive back-of-the-envelope calculation last night. Light travels at about 3*10^8 meters/sec, so in one 3-billionth of a second, that's about 10cm. An i7-3930k is about 2cm on a side. Now I'm not sure what is the propagation speed of a voltage change through all of those silicon gates, but ethernet cable propagates a signal at about 65% of light speed, and I'm guessing it's lower than that. From this perspective, it's amazing to me that I can clock my i7-3030k to 5GHz.

Are there any experts who can comment on maximum theoretical clock speeds? Does the physical die size simply have to get smaller for overall clock speeds to increase? Is this actually the limiting factor?
 
I did a naive back-of-the-envelope calculation last night. Light travels at about 3*10^8 meters/sec, so in one 3-billionth of a second, that's about 10cm. An i7-3930k is about 2cm on a side. Now I'm not sure what is the propagation speed of a voltage change through all of those silicon gates, but ethernet cable propagates a signal at about 65% of light speed, and I'm guessing it's lower than that. From this perspective, it's amazing to me that I can clock my i7-3030k to 5GHz.

Are there any experts who can comment on maximum theoretical clock speeds? Does the physical die size simply have to get smaller for overall clock speeds to increase? Is this actually the limiting factor?

It is relative to the process used in the manufacture. Don't get speeds mixed up though because they are not really related.
 
I did a naive back-of-the-envelope calculation last night. Light travels at about 3*10^8 meters/sec, so in one 3-billionth of a second, that's about 10cm. An i7-3930k is about 2cm on a side. Now I'm not sure what is the propagation speed of a voltage change through all of those silicon gates, but ethernet cable propagates a signal at about 65% of light speed, and I'm guessing it's lower than that. From this perspective, it's amazing to me that I can clock my i7-3030k to 5GHz.

Are there any experts who can comment on maximum theoretical clock speeds? Does the physical die size simply have to get smaller for overall clock speeds to increase? Is this actually the limiting factor?

You are sort of on the right track, but keep in mind, while a CPU may be 2cm on a side, it is made up of many smaller subsections. The current need only travel the microscopic distance between a few transistor per clock cycle.
A CPU's architecture is more important in determining the maximum theoretical clock speed.

This is where we get into discussion of pipeline stages. Instructions sent to the CPU are decoded into micro-ops, the micro-ops are then completed in steps. Each step actually requires a minimum amount of time to complete based on the complexity of the step and the laws of physics. Clock speed can never exceed the minimum amount of time required for the slowest step.
The complexity of the step can be changed however by adding or removing stages from the pipeline, making each stage more or less complex. Netburst chips(pentium4), for example, were designed with an obscenely long pipeline in the hopes that it would allow for insane clock speeds, by simplifying each step of the execution process. Maximum theoretical clock speed for Netburst was over 10Ghz.
 
Netburst chips(pentium4), for example, were designed with an obscenely long pipeline in the hopes that it would allow for insane clock speeds, by simplifying each step of the execution process. Maximum theoretical clock speed for Netburst was over 10Ghz.

We see how well that worked out for Intel now didnt we... :shrug:
 
You are sort of on the right track, but keep in mind, while a CPU may be 2cm on a side, it is made up of many smaller subsections. The current need only travel the microscopic distance between a few transistor per clock cycle.
A CPU's architecture is more important in determining the maximum theoretical clock speed.

Thanks ViperX, that's very informative. I had just assumed that the input from the top-right pin on the CPU on one clock cycle could potentially affect the output from the bottom-left pin on the next. In any case it sounds like propagation speed is something the microchip engineers have to take into account?
 
Thanks ViperX, that's very informative. I had just assumed that the input from the top-right pin on the CPU on one clock cycle could potentially affect the output from the bottom-left pin on the next. In any case it sounds like propagation speed is something the microchip engineers have to take into account?

It certainly has to be taken into account in the design of the chip, but in practical terms, power consumption becomes the biggest limiting factor to increasing clock speeds.
 
I did a naive back-of-the-envelope calculation last night. Light travels at about 3*10^8 meters/sec, so in one 3-billionth of a second, that's about 10cm. An i7-3930k is about 2cm on a side. Now I'm not sure what is the propagation speed of a voltage change through all of those silicon gates, but ethernet cable propagates a signal at about 65% of light speed, and I'm guessing it's lower than that. From this perspective, it's amazing to me that I can clock my i7-3030k to 5GHz.

Are there any experts who can comment on maximum theoretical clock speeds? Does the physical die size simply have to get smaller for overall clock speeds to increase? Is this actually the limiting factor?

i7-3930k has a die size of 435 mm^2
 
The metals used for the interconnects also have maximum theoretical bandwidth limitations as well as size limitations which is just about where both Intel and AMD are now, which is why they are giving us more cores rather than pure speed. I think 10ghz is probably the maximum speed attainable for the current technology we have today.
The manufacturing process can only shrink so much before you run into atomic separation issues (sorry I can't explain it better), unless they come up with some kind of molecular interconnect scheme
 
Well mainstream today is close to the limits for air. We are starting to see diminshing returns.

There have 500Ghz runs by IBM and there may be faster out there. Like I said in my first post; "it is really all relative to the process."

Many here could give a detailed answer but that would just lead to more questions and more andwers and some would get confused and we would end up at the beginning quoting ourselves.
 
^^^What Archer said ^^^
They Intel/AMD are currently near the molecular level of technology, and the interconnects will show little if any improvement speed wise because of the limitations of the metals involved...once you get to the atomic level, then there is more space between the metal atoms and electrical currents will be harder to transmit I am not a phd, so I cannot explain it any better....I barely understand it myself :cool:

Hey archer...Are you sure it was 500ghz? could it have been 500gflops?
I wonder what kind of cooling they were using, and what memory brand used..I would be interested in some memory that will do those kind of speeds, and I'll bet the cas latency was tremendous!
I do so love theoretical discussions :)
 
^^^What Archer said ^^^
They Intel/AMD are currently near the molecular level of technology, and the interconnects will show little if any improvement speed wise because of the limitations of the metals involved...once you get to the atomic level, then there is more space between the metal atoms and electrical currents will be harder to transmit I am not a phd, so I cannot explain it any better....I barely understand it myself :cool:

Hey archer...Are you sure it was 500ghz? could it have been 500gflops?
I wonder what kind of cooling they were using, and what memory brand used..I would be interested in some memory that will do those kind of speeds, and I'll bet the cas latency was tremendous!
I do so love theoretical discussions :)

Nope 500Ghz but it was useless in reality. They used Sil-Ger at -~450. I have heard tale of much faster speeds on a single transistor as well: http://www.newscientist.com/article/dn7253-worlds-fastest-transistor-operates-at-blinding-speed.html

Again all useless at this point.
 
Believe the cutoff for silicon as a base for the transistors is something like 11nm (?). Not 100% sure on that. I do know that research is being done on graphene transistors though. Since carbon, as graphite, forms sp2 bonds, it creates strong network covalent bonds laterally, but not vertically (which is why graphite is used for pencils, it sheers off in layers). Graphene is a layer one [C] atom tall, and is being considered for the transistors due to its conductivity, and extremely small size (think fractions of a nm wide).

http://www.technologyreview.com/computing/18264/

http://en.wikipedia.org/wiki/Graphene

http://en.wikipedia.org/wiki/Graphite
 
It varies, according to a rather knowledgeable guy who's video I watched high clocked P4s already have information that spends multiple clocks simply going from one side of the CPU to the other.

The important thing to remember is that electricity goes at .7 lights in a perfect conductor, not all conductors are created equal and the electrical impulses travel more slowly in some than others. Depending on the wiring (even at the CPU level) differing levels of capacitance need to be overcome to reach the 0/1 thresholds as well, leading to even slower signal propagation times.
Chips that can compensate for that are the ones that clock really, really high. P4s and BDs for instance.

While you're contemplating such things consider a 10' gigabit network cable. Given that electricity goes at .7C(c?) there are multiple bits of information on the copper at any given time, they've been sent but not received yet.
Now consider the multiple-gigabyte links that go from my area 150 miles over the mountains. There are entire megabytes, maybe even gigabytes, that exist only in the fiber.

Regardless, it comes down to the result that lightspeed isn't the issue particularly.

More specific details are in this video, somewhere:
http://www.infoq.com/presentations/click-crash-course-modern-hardware
It's a fascinating video regardless.
 
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