purpose of Zclck?

Eio · 01-02-03, 07:38 AM

Obviously I don't know much about overclocking so that’s why I turn to you guys=). I’m learning as I go along so please forgive me. In my BIOS I left it as default(66mhz). Could someone clear this up for me? Performance wise, what do I get out of it if I set it higher? Thx

batboy · 01-02-03, 08:19 AM

Not sure what that is, hmmmm. What motherboard and system do you have? What first comes to mind as having a 66 MHz bus is the AGP bus, but never heard it called Zclck before.

TheNamelessOne · 01-02-03, 01:56 PM

I'm thinking that was a typo. Not really sure what he could have meant.

NookieN · 01-02-03, 02:16 PM

There is a Zclk on some of the P4 chipsets. It is not the same as the AGP clock. It _might_ (and that's a very cautious might) be the control clock that connects the northbridge hub with the southbridge hub. In any case, I would leave it alone.

Eio · 01-02-03, 06:24 PM

Right Nookie, the "Zclck is the transfer rate between the Northbridge and Southbridge. The default speed is 66mhz."

01-02-03, 07:38 AM	Thread Starter #1
Eio New Member Join Date: Dec 2002	purpose of Zclck? Obviously I don't know much about overclocking so that’s why I turn to you guys=). I’m learning as I go along so please forgive me. In my BIOS I left it as default(66mhz). Could someone clear this up for me? Performance wise, what do I get out of it if I set it higher? Thx
	QUOTE Thanks

01-02-03, 08:19 AM	#2
batboy Senior Moment Join Date: Jan 2001 Location: Kansas, USA	Not sure what that is, hmmmm. What motherboard and system do you have? What first comes to mind as having a 66 MHz bus is the AGP bus, but never heard it called Zclck before. __________________ 2600K, Asus P8P67 Deluxe, 2X2GB G.Skill Pi PC3-2133, PC & Cooling 750W watercooled: Eheim 1048 pump, Swiftech Apogee GTX and 2X120mm rad FS020 case, OCZ SSD, Sapphire HD 6950, Acer X241W 24" widescreen
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01-02-03, 01:56 PM	#3
TheNamelessOne Member Join Date: Dec 2002 Location: under a killing moon	I'm thinking that was a typo. Not really sure what he could have meant.
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01-02-03, 02:16 PM	#4
NookieN Member Join Date: Jul 2002 Location: The West	There is a Zclk on some of the P4 chipsets. It is not the same as the AGP clock. It _might_ (and that's a very cautious might) be the control clock that connects the northbridge hub with the southbridge hub. In any case, I would leave it alone.
	QUOTE Thanks

01-02-03, 06:24 PM	Thread Starter #5
Eio New Member Join Date: Dec 2002	Right Nookie, the "Zclck is the transfer rate between the Northbridge and Southbridge. The default speed is 66mhz."
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purpose of Zclck?

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