KX7-333R + TBreds + unlocking

Originally posted this in the Techincal Discussion forum, but on reflection I think that's probably the wrong place, so I've posted it here. Apologies.

I have an original revision of the Abit KX7-333R motherboard, which apparently doesn't support the Thoroughbred processors properly.
Does anyone know categorically what the problem is with the initial revision of this board that causes problems with some or all of these processors?

I've been doing some trawling around trying to deduce as much information about these processors as possible, but it's a total minefield of conflicting information and conjecture on a lot of sites.

Here's what I've found so far:

With the introduction of the Thoroughbred, AMD changed the way the default multiplier is encoded on the chip package. Before, it used to be done using a combination of the L3 and L4 bridges, there being four of each.

Now on the Thoroughbred, all the L4 bridges appear to be open at all times, and the multiplier encoding is done using the L3 bridges only, of which there are now 5. From left to right, these bridges correspond to multipliers of 0.5x, 1x, 2x, 4x & 8x.

Sounds simple so far doesn't it, oh I wish...

What multiplier is actually set obviously depends on which of these bridges are open, but it's not a direct correlation. If all the bridges were open, you'd only get a 15.5x multiplier, which obviously isn't enough. For this reason there's a fixed offset used, which differs depending on the value set using the bridges.

For L3 bridge values of 0x to 1.5x inclusive, a fixed offset of 11x is added, giving you the 11x to 12.x multipliers.

For L3 bridge values of 2x to 7.5x and 10x to 15.5x, a fixed offset of 3x is added, giving 5x to 10.5x and 13x to 18.5x respectively.

Mad eh? Note that not all possible values are actually valid, and for some reason the 14.5x setting equates to 18x rather than the 17.5x you'd naturally assume. Oh well. Onto the L1 bridges.

As we all know, the L1 bridges are what lets you overclock the processor. If open, they allow the motherboard to set the multiplier and override the in-built default.

With the introduction of the Palomino, the L1 bridges were redesigned from the Thunderbird with the laser-cut pits between each one, grounded at the bottom of the pits, thus making simple connection of them rather difficult. I tried to do this on an XP1800 processor and failed miserably.

With the Thoroughbred, these pits are no longer present. Now I've seen conflicting information here, as some people claim these processors are shipped unlocked and a suitable motherboard can override the setting, yet others claim you still need to connect the L1 bridges using conductive paint or similar, although this process is obviously much easier without the pits in the way.

Personally the latter makes more sense to me, as I cant see how these processors can be unlocked as shipped, since the L1 bridges are not connected.

Now onto problems with motherboards.

As said above, the 5th L3 bridge controls the 8x multiplier, and from the figures above, you can see that this needs to be open in order to set the 10x to 15.5x range of values, which correspond to the 13x to 18.5x multiplier values.

If the processor is locked, then the motherboard doesn't need to do anything to set this multiplier, as the processor will default to the value encoded using the L3 bridges and all will be fine. Problems arise, however, if the L1 bridges are connected and the motherboard has control of the multiplier.

It appears that some motherboards do not have the ability to control the 8x multiplier line, as this 5th line was added by AMD to cater for higher multipliers. In this situation, the 13x and upwards multipliers cannot be set by the motherboard, and you're stuck basically. Even if you install a new BIOS which is capable of selecting the higher multipliers, as opposed to the generic >=12.5x setting, you will end up with the wrong multiplier as the 5th line will not be transmitted to the processor. In this case, the lines representing 10x to 15.5x will actually end up transmitting the low 4 lines only, producing the wrong (lower) multiplier.

Now I'm not sure if this is where the board modifications come in. Do the mods carried out by Abit enable this 5th line, thus allowing multipliers of higher than 12.5x to be selected? Frankly I'm dubious about this. If the processors are indeed locked as shipped, since the L1 bridges are open, then the motherboard doesn't need to set the multiplier at all, and all CPUs would work correctly.

For this reason I suspect the mods carried out are intended to fix another problem, but I'm not sure what. Whether it's something to do with subtle voltage or timing requirements of the Thoroughbred core I don't know, but this is pretty much the only thing I can think of. If indeed this is the case, then the problems would extend to all Thoroughbred processors, including the lower speed variants with this newer core.

I certainly cant see any differences between the 2200+ and 2400+ processors which would allow the 2400+ to work when the 2200+ doesn't. If my assumption about the processors being locked as shipped is correct, then the multiplier setting on the motherboard is irrelevant. If the processors are unlocked as shipped, then the motherboard would be incapable of producing any multiplier greater than 12.5x and even the 2100+ and 2200+ would fail to work correctly.

Any comments or corrections are more than welcome here. I'm trying my best to understand all this and I'm not sure how well I'm doing

welcome to tha forums

I don't have all the answers, but here is what I can tell you. I have a 1800+ Tbred and KX7-333 motherboard. The CPU was definitely unlocked from the factory, and I can set multipliers in the 5.0 to 12.5 range.

If you read the following Document from the AMD website, you will note that only 4 of the multiplier bridges are connected to PINS on the chip (Chapter 11). These are PINS are FID[3] thru FID[0]. The document also states the following:

"The chipset samples the FID[3:0] signals in a chipset-specific manner from the processor and uses this information to determine the correct serial initialization packet (SIP). The chips then sends the SIP information to the processor for configuration of the AMD Athlon system bus for the clock multiplier that determines the processor frequency indicated by the FID[3:0] code. The SIP is .....".

I think that this is how the motherboard is able to select the CPU multiplier within certain ranges. The mobo reads the 4 PINS and then sends this information to the CPU; of course, the motherboard can also ask the user what multiplier they want to use and ignore the 4 PINS. The 5th bridge determines whether the CPU multilplier is in the 5-12.5 range or the 13 to 18.5 range.

Now that I have said all this, I have a couple of questions myself. I think the motherboard has to read the 5th bridge somehow, or else the BIOS multiplier selection would be all messed up. I know that I have read something in the forum here about people with the higher end Tbreds connecting the 5th bridge to get access to the lower multipliers, but can they get access to all the multipliers at the same time (meaning 5-18.5)?

Well that is probably enough for now. Maybe someone else can shed some more light onto this topic.

Vertigo1,
Sounds like you've been to our site at beachlink.com and digested the Multiplier Code pretty well. As for the various "mods", they are in reality "workarounds" for earlier mobos that (for whatever reason) are not able to cope with the 5th 8X Bit Value esp when it's set HI as begun with the Palominmo 2100 @13X and Tbred 2200 @ 13.5X.
For example, when the 8X Bit Value signal circuit is modded from default HI to LO, in effect the CPU looks like an older 4 bit Multiplier Code Duron/Tbird, or a Palomino 2000 or lower, all with the 8X BV circuit LO by default and which the earlier mobos "were capable" of coping with vis a vis the lower 4 bit 5X thru 12.5X Multiplier range...in effect the mod "signals" the system that a 4 bit CPU is in the socket, and so the "4 bit tables" any mobo components use seem to work for the 5X thru 12.5X range.
Problem "continues" though 'cause even many of the "newer" mobos "supposed" to be able to cope with the 5th 8X BV HI also have issues resetting the "full range" of Multipliers above AND below 12.5X...so various schemes/mods are still needed. It's a real mess, and we doubt that any one person knows what's needed for "all" the various combos of mobos, their models, and esp all the bios revisions...we certainly don't. (And we're assuming all L1 bridges are closed by default or correctly by the user so that there are no issues in that regard). Anyone building a system today needs to do lots of research at the mobo mfr's site, read the manuals if possible, ask questions about what works, but ask also for proof 'cause there's a lot of mis-information floating around.

Edward2, you wrote re the Northbridge and the FID[3:0] signals/pins....
"The chipset samples the FID[3:0] signals in a chipset-specific manner from the processor and uses this information to determine the correct serial initialization packet (SIP). The chips then sends the SIP information to the processor for configuration of the AMD Athlon system bus for the clock multiplier that determines the processor frequency indicated by the FID[3:0] code. The SIP is ....." Yes this comes right out of the data sheet....but......

These are NOT the Multiplier Code signals that go directly to the Multiplier module, they are Multiplier "ID" signals that go to the Northbridge which then sends system setup timing info back to the CPU....that's what "for configuration of the AMD Athlon system bus" means. It's a one time system timing setup operation during boot to get the timings and whatever else is involved correct for the FSB and Multiplier being used. We might even suspect that this function might be an issue with regard to the continuing need for mods in newer mobos...'cause this is described as a 4 bit signal set, FID[3:0], while the Multiplier since Palomino is coded with a 5 bit signal set. For example, we could ask the question..."How does the Northbridge know that a 15X Tbred 2400 is in the socket and not a 7X Tbird??", 'cause the 1st 4 bits of Tbred's 15X are exactly the same HI/LO pattern as the 4 bits for the 7X Tbird...and remember the NB only gets 4 bits = FID[3:0]...not 5 bits "as far as we know". Wonder if anyone can answer that.
John C.
Also FYI, the 5 pins connecting the 5 Multiplier signal circuits to the mobo/bios for resets thru closed L1 bridges are completely different from the 4 FID[3:0] pins connecting to the Northbridge. They are "undocumented" but we traced/located them early on. Read the articles at
http://www.beachlink.com/candjac/index.htm all bridges, socket pins, and circuits are identified via pics and diagrams...Multiplier Code is also explained.

As we said before...it's a mess...try to understand the Multiplier Code, mods etc, then tread very carefully....and beware of "mis-information". Finally, we think the newer problems are in the mobo/bios/Northbridge because the signal circuit for the 5th 8X BV is exactly the same as the 1st 4 signal circuits, so hardware wise AMD would seem to be clean. But maybe communications between AMD and mobo mfrs about necessary software might be an issue where either one or both are at fault...who knows??

Hi John,

Thanks for that info, my ongoing quest to decipher what on earth AMD and Abit are up to continues.

I've got a thread going on the Abit forums which in which I've posted some of my initial findings:

http://forum.abit-usa.com/showthread.php?s=&threadid=1739

Hey John, thanks for the info and update. Obviously you have done a lot of research into this. As I mentioned in my previous post, I have done some reading of various documents from the AMD website trying to figure out the multiplier issue and the default voltage issue, but it is not always easy to figure out what it actually means. With regards to the multiplier issue, I made quite a few assumptions based on what I thought might be happening, but I did not test any of my theories since the multiplier was unlocked on my motherboard already. The voltage issue was much easier to figure out. I modified my default voltage by jumpering the VID pins, instead of connecting the bridges. I had hoped that someone would read this thread and help clarify the issue, and you have definitely helped.

BTW, the link you posted is not working.

Edward2 said:

Hey John, thanks for the info and update. I have done some reading of various documents from the AMD website trying to figure out the multiplier issue......With regards to the multiplier issue, I made quite a few assumptions based on what I thought might be happening, but I did not test any of my theories since the multiplier was unlocked on my motherboard. I had hoped that someone would read this thread and help clarify the issue, and you have definitely helped.

BTW, the link you posted is not working.

Click to expand...

Edward2,
No apologies needed as it's nearly impossible to decipher what's going on during the boot process. You'll note that even our contribution is only general/not specific, based primarily on the hopefully "rational interpretation" of the "for configuration of the AMD Athlon system bus" phrase, which suggests configuring timing issues/settings for that bus, which would logically be dependent on FSB and Multiplier.
Try the link again as we have removed an offending "comma" at the end. Esp read the Palomino article which suggests that FID[3:0] signals, formerly set "separately" with L6 bridges on Duron/Tbird, have since been "branched off" from actual Multiplier signal circuits, since there are no longer any signs of a separate bridge set performing the FID[3:0] function like the L6s did on Duron/Tbird....interesting.

Vertigo1,
Interesting thread you linked to...hope you get to the bottom. We specialize in tracking down various CPU bridges' codes and circuits...can't hope to cope with various mobos' idiosyncrasies...we just note bridge related /mods problems as they are posted. Conclude with this "simplified" observation/history of current issues.....

In the beginning we had 4 bit Duron/Tbirds and mobos had no problem setting the "full range" which was 5X thru 12.5X...( ignoring open L1s issue). Then with the 5th 8X BV bit we still had no problem as long as that bit was set LO/disabled...(to mobos these look like 4 bit CPUs). Then, "no surprise" that older "4 bit" mobos would have problems with 5 bit/13X and up, this would be a "normal transitional expectation" which various mods "worked around". But how come at this point in time we don't see at least a half dozen mobos that can simply change unlocked Tbreds from say 7X thru at least 17X via just the user defined Multiplier option in bios...no mods.
John C.

John, while you're here.

Once I've got this motherboard properly modded by Abit, I want to have a go at closing the 5th L3 bridge to release the lower multipliers so I can bump the FSB to 166Mhz.

I'm loath to modify the processor itself, do you know which pins on the socket I have to short with the "u" shaped wire trick?

info

Short and Sweet:

L1's are all closed on tbreds. If the Tbred has a stock multi bleow 12.5 (XP 2000+ or lower), then it will be unlocked on a KX7 or any other kt266/333 board. It will also be unlocked (for multi's below 12.5 on any motherboard that allows you to manually set the multi's. Higher model Tbreds will be locked on a KX7 or any board that doesn't support manually setting multiplyers that are 13x and up. These CPU's are unlocked however, but only for the high multiplyers and on boards that can manually select those high multiplyers.

Any Tbred is easily unlocked for 12.5 or lower multi's by closing the 5th L3 bridge. I used crayon to fill the pit a defogger paint to connect the dots. It was the easiest unlock ever and took all of 30 seconds.

KX7 notes: my original revision KX7 can't get as high FSB with a 2400+ as it could with an 1800+ palomino. Nothing but the cpu and bios was changed, but all of a suddne my memroy timings don't work as well, nor does my FSB. I think I'll switch back to the non-Tbred bios. To get a newer revision you need to send the board to Abit for physical modification.

Hi, thanks for the info.

Firstly, I am taking my mobo down to Abit this Tuesday to be modified, although the XP2400 appears to work in at atm, it's a bit shaky I think.

Secondly, I know all about closing the 5th L3 bridge to unlock the lower multipliers, I just want to achieve this by shorting the corresponding pin-holes in the socket, rather than touching the CPU. Someone on here had a nice photo of a Socket A, with the two pin-holes highlighted in red, but I cant find it anymore.

unlock

IMO, the bridge painting is easier and safer.

Well tbh I've given up trying to find something to paint with.

I've got a bottle of silver laquer, and a "micro-tip" conductive silver pen, and frankly they both suck.

In both cases the liquid is far too "runny", and not viscous enough. As soon as a slight amount of it touches the chip packaging it goes everywhere.

Frankly I think the socket jumper would be an easier proposition.

I'm not doing any of this until I've had the mobo done by Abit.

Vertigo1 said:

John, while you're here.

Once I've got this motherboard properly modded by Abit, I want to have a go at closing the 5th L3 bridge to release the lower multipliers so I can bump the FSB to 166Mhz.

I'm loath to modify the processor itself, do you know which pins on the socket I have to short with the "u" shaped wire trick?

Click to expand...

AJ27 is the socket/pin connected to the 5th L3 bridge. Nearby is a ground = Vss pin which you can locate from the pinout diagram in 25175.pdf datasheet at AMD site.
Gives you a chance to double check locations found elsewhere yourself. BTW, AJ27 is marked as NC = no connection...probably AMD's token attempt to hide connections to Multiplier signal circuits/discourage overclocking...note other 4 NC pins in the area, we traced them out early on Duron/Tbird.
John C.

Vertigo1 said:

Well tbh I've given up trying to find something to paint with.

I've got a bottle of silver laquer, and a "micro-tip" conductive silver pen, and frankly they both suck.

In both cases the liquid is far too "runny", and not viscous enough. As soon as a slight amount of it touches the chip packaging it goes everywhere.

Frankly I think the socket jumper would be an easier proposition.

I'm not doing any of this until I've had the mobo done by Abit.

Click to expand...

I think the defoger paint is thiker also use a needle to apply the paint

Im on a mad hunt for the defoger kit as I have a 2100 t-bred in the mail