need an expert opinion on cas settings...

i have a two sticks of 256 mb infineon ram chips...

one is double sided and is rated cas 2 at 133 (but can do 155 cas 2 and 163 cas 3) and rate 7ns

and the other is single sided and is rated cas 3 at 133 (but can do 163 at cas 3) and is also rated 7ns...

at 163 fsb, i can set cas latency and precharge to cas 2...

but i must set ras to cas delay at cas 3...why? what is ras to cas delay?

and i set the cycle time and bank cycle time to auto and sisoft reports 5/7 and cpuid reports 7/9...

what is the most important setting for performance and why?

dustybyrd said:

what is ras to cas delay?

Click to expand...

This feature allows you to insert a delay between the RAS (Row Address Strobe) and CAS (Column Address Strobe) signals. This delay occurs when the SDRAM is written to, read from or refreshed. Naturally, reducing the delay improves the performance of the SDRAM module while increasing it reduces performance.

Therefore, it is recommended that you reduce the delay from the default value of 3 to 2 for better SDRAM performance. However, if you experience system stability issues after reducing the delay, reset the value back to 3.

system stability? i can't even post at 163+ fsb if the ras to cas delay is set to 2...it doesn't post until the fsb is set to less than 150 fsb...

however, the 1.0a is perfectly stable at 2,3,2 at 162 fsb all night running seti at 1.63 volts...

why is it that these infineon chips are both rated 7ns pc133---but one is rated cas 2 and the other cas 3?----i would have thought that 7ns would have provided the same performance?

i'm not an expert, but i think that you should run both of memory modules at the same ras cas etc. this may provide better oc. you have to decide if you want mem bandwidth or good oc.

they are both in the machine at the same time...and both running at the same speed 2,3,2 with 3 being the ras to cas delay...

and the o/c is the same with the same stability as cas 3,3,3...

but i can't do cas 2,2,2 at 162 fsb--

shouldn't this have been posted in the memory section

sorry, you're right