QuietIce said:
Let's just stick with the CPU settings we started with, OK? We can easily change the RAM ratio and get BM results. Perfect or not they're certainly close enough to figure out what divider is being used.
I'm trying to help you here ... The result you are claiming is at odds with precise measurements done by a highly respected motherboard designer, and numerous bandwidth tests done previously to determine this. They have all, without exception (at least the one's I've seen), shown that a 13 divider is being used. I should note that I haven't been actively chasing this topic for the last year so it's possible I may have missed results on more recent chips. While it's not impossible that AMD have changed the divider table on later rev chips (especially as it was marked as reserved), I'd like to see something more conclusive than just two points, and a plot of memory bandwidth with respect to multiplier does this very cleanly - if a 12 divider is being used, you will see a big peak at 11x, and if a 13 divider is being used you will see a big trough at 11x. Identically at 5.5x, 16.5x, and 22.0x multipliers as well.
If you give me a day or two I can cook up a program that will walk through the multipliers and do latency and bandwidth measurements at each point. Would require a floppy disk (ideally) but making a bootable CD would work too as long as you don't mind copying numbers off the screen to paper. Being pre-boot means that nothing funky can be happening with dual-core-ness or wierd OS stuff and will give very accurate numbers.
Otherwise, it doesn't take too long to change the multiplier and boot up memtest86 a few times, and I would be very interested in having solid proof that the divider they are using has been changed. At which point it becomes and interesting question of WHEN it was changed
QuietIce said:
With that in mind, we now have a setting of 166 in the BIOS. Starting with our baseline CPU of 246x11 we end up with a CPU/14 divider. This holds true whether we use 166 MHz or a 5:6 ratio (166.666666666666 ...). We should expect a result of about -21.4%:
246x11 @ 5:6 buffered .. 5245/5212 (- 21.6%/ -21.8%)
246x11 @ 5:6 unbuffered 4420/4411 (- 20.0%/ -20.7%)
Are we now in dispute over the resultant CPU divider with a 166 (5:6) setting or are we still blaming SiSandra for "sublinear" scaling ...?
While the sublinear scaling comment still holds - it should not be possible to get a 9.2% decrease in bandwidth from a 8.4% decrease in memory speed - it's much more interesting to line the three things up side by side by ratio. First of all, if a 13 divisor was being used:
246.00 = 6691
208.15 = 6080
193.29 = 5245
And then if a 12 divisor was being used:
246.00 = 6691
225.50 = 6080
193.29 = 5245
The 11:12 ratio memory bandwidth sits somewhat in the middle (slightly closer to 1:1) of the other two, which fits the predicted speeds much better if a 12 divisor was being used.
That said, I'd still really love to see the multiplier-to-bandwidth measurements as these show any wierd stuff that's going on in the background. But at this point, it does look like AMD have, at some point, changed/fixed the divisor table for the 11:12 ratio. So if there's anyone else out there with an hour to kill, I'd be very interested to see bandwidth-vs-multiplier results for you as well (ideally with date codes and OPN steppings, though CPUID steppings would probably be good enough).