For Intel CPUs, it is the FSB (through the NB) that determines the amount of data that gets to the core or cores. The number of cores doesn't affect that speed. So in the future as more and more cores are added, you may not be able to feed them fast enough. This is one among several reasons to put the memory control on the CPU die.
With the memory controller on the CPU die, such as AMD currently uses and Intel plans to do in the future, the communication between memory and the CPU is faster (less latency). Memory speed in this case is controlled by what is called "the memory divider" and the speed is relative to the CPU speed, not the FSB speed.