- Joined
- Sep 14, 2012
- Location
- AMD land
Just found something interesting regarding the improvements that may be made to steamroller.
In short :
-Store to load forwarding optimization
-Dispatch and retire up to 2 stores per cycle
-Improved memfile from 3 stores last to last 8 stores, and allow tracking of dependent stack operations.
-Load queue (farm) size increased to 48, from 44.
-Store queue (STQ) size increased to 32, from 24.
-Increase dispatch bandwidth to 8 INT ops per cycle (4 to each core), from 4 INT ops per cycle (4 to just 1 core). 4 ops per cycle per core remains unchanged.
-Accelerate SYSCALL/Kim.
-Increased L2 BTB size from 5 K to 10 K and from 8 to 16 banks.
-Improved loop prediction.
-Increase PFB from 8 to 16 entries. the 8 additional entries can be used either for prefetch or as a loop buffer.
-Increase snoop day throughput.
-Change from 4 to 3 FP pipe stages.
Hope ya'll enjoy it
Source
In short :
-Store to load forwarding optimization
-Dispatch and retire up to 2 stores per cycle
-Improved memfile from 3 stores last to last 8 stores, and allow tracking of dependent stack operations.
-Load queue (farm) size increased to 48, from 44.
-Store queue (STQ) size increased to 32, from 24.
-Increase dispatch bandwidth to 8 INT ops per cycle (4 to each core), from 4 INT ops per cycle (4 to just 1 core). 4 ops per cycle per core remains unchanged.
-Accelerate SYSCALL/Kim.
-Increased L2 BTB size from 5 K to 10 K and from 8 to 16 banks.
-Improved loop prediction.
-Increase PFB from 8 to 16 entries. the 8 additional entries can be used either for prefetch or as a loop buffer.
-Increase snoop day throughput.
-Change from 4 to 3 FP pipe stages.
Hope ya'll enjoy it
Source
