Different Strokes for Dual DDR

Impact of overclocking dual DDR – Ed

Current strategy for the PIV suggests that for maximum performance, one should run memory at a higher speed than the FSB. This article explains why that approach works for the PIV, doesn’t work for the Athlon, and why dual DDR PIV will be like Athlons in this regard.

Athlon

This little chart gives the total FSB bandwidth of an Athlon chipset and the maximum memory bandwidth of DDR at that FSB.

You can see the FSB and the memory bandwidth are exactly the same.

FSB bandwidth is the interstate highway of your computer, all the messages from most parts of your computer have to all fit onto that highway. Like the highway, if you put more traffic on the highway than it’s meant to handle, you get bottlenecks. In this situation, this is like putting four cars abreast of each other on a four-lane highway. It fits.

Let’s see what happens when you run memory faster than than the FSB (FSB:Memory ratio of 4:5).

The memory bandwidth now exceeds the FSB bandwidth. Running memory faster than FSB simply tries to put five cars abreast on a four lane highway. They just don’t all fit, so you can’t expect the performance boost you’d otherwise expect from faster memory, and in real life, you get little improvement from it.

Since memory doesn’t always run full throttle, there can be some slight improvements, but they are nowhere near what you get from an equivalent increase in a nonbottlenecked system.

To get the benefit of faster memory on an Athlon system, you have to broaden the highway so it can handle the faster memory, and you do that by raising the FSB.

Single-Channel PIV

The PIV FSB is different than the Athlon’s. For our purposes, all you need to know is that it provides double the bandwidth at a given FSB speed of the Athlon.

So, this is what the bandwidths on a single-channel PIV system look like:

You can see that memory bandwidth takes up only half the available FSB room.

Let’s see what happens when you run memory faster than than the FSB (FSB:Memory ratio of 4:5).

There’s still plenty of room left on the PIV FSB highway. To use the earlier example, memory is still trying to get four and then five cars abreast of each other, but the PIV chipset provides an eight-lane highway. No bottlenecks here.

But look what happens next:

Dual-Channel PIV

In a dual-channel DDR system, you have two DDR sticks providing memory at the same time rather than just one. This is like doubling the number of cars on the highway. The FSB rules don’t change.

Here is what the bandwidths on a dual-channel PIV system look like:

You can see the FSB and the memory bandwidth are exactly the same. Just like with the Athlon, except it’s eight cars on an eight-lane highway rather than four.

Let’s see what happens when you run memory faster than than the FSB (FSB:Memory ratio of 4:5).

We get the same bottleneck we had with the Athlon, except now it is ten cars trying to fit on an eight-lane highway.

What This Means

What this means is that people shouldn’t expect improvements running memory faster than FSB on a dual-channel DDR board.

This means people planning on overclocking dual DDR systems should plan to run their memory at the same speed as their FSB. For practical purposes, it means that buying PC3500 or even 3200 won’t do you much good given the likely 3-3.2GHz overclock most air-based overclockers are likely to get. The overclocked FSB speeds will probably be at or a bit above 166 MHz, so two good sticks of PC2700 memory will probably suffice.

Running memory faster than FSB simply tries to put five cars abreast on a four lane highway. They just don’t all fit, so you can’t expect the performance boost you’d otherwise expect from faster memory, and in fact, you don’t get it.

Ed