2500+ unlocking effort, strictly directions

[emboss]

Just another note ... like the TBreds, the locked bartons have a "ground" plate under where the laser cut is made. This can be measured by forcing a pin down into the crack and checking the resistance between there and the opposite side of the resistors: 0 Ohms. So stuffing the hole full of a conductive material will not be a good idea (needs insulation first).

 

[darkman101010]

The Idea to close or open the Bridge and you can change the Multiplier over the Mainboard Jumper or Bios is 100% dead ... thats i mean! This function is 100% deactivated from AMD ...

 

[hitechjb1]

Originally posted by emboss (from another thread)
Got the coating off the first of the L3 bridges ... all I can say is that I have great admiration for anyone that does the whole lot. It took me a good 10 minutes with a pin and a microscope to carefully scrape it off. Note that it comes off a bit easier when it's warm: mine was sitting under a 100W lamp at a distance of about 5cm, so was relatively warm when I was taking it off (not damagingly hot though).

My next step is to bring a wire out from the L3 bridge (I've got some very thin ribbon cable) so that I can measure the voltages when its running with various multiplier settings. It won't be done until Monday afternoon my time as I'm working this weekend and I only like to do this sort of thing when there's plenty of light around.

Assuming you have a 2500+, all the five L3 bridge is closed. Can you measure quickly what is the resistance of each L3 pin to VCC and VSS, to make sure there is an active path to VCC and VSS. The two should be roughly the same. Also you may measure twice with the ohmmeter polarity reversed.

Measuring the voltage at the L3 bridge with changing multiplier setting in bios is an interesting idea. This is an important step to see whether these bridges response at all.

If it does not change at all, it means the bridges are not used. (Deathstar13 alrealy measured the 5 bridges are connected to the five BP_FID pins which is for wiring tricks.)

If it changes, its signal can still be blocked or bypassed internally.

 

[hitechjb1]

...

... from Vcc to open Bridges is the same!!! ... ok!!!

Thanx ... i anderstand the low Resistace fom VCC to VSS ... the Prozzessor have high Power high Ampere with low Volt (R=U/I) ....



Darkman

I did an estimate for the resistance between VCC and VSS a while back, I estimated that resistance is very small. When the CPU is active, that resistance is less than 1 ohm !!!

For details,
What are the value of C and R of a CPU for power estimation (page 14)

 

[darkman101010]

... okok i understand this ... many High *gggg*

i can not calculate with C ... and ... and .. and... ok

This is my Logic:

I have a CPU with Power Consumentation of 70 Watt and VCore is 1,8 .... P=u*i ... i=p/u ... I=38,8 Ampere

R=u/i ....R= 0,046 Ohm ... ok is very low resistance ...

Ok this is Basic for Electronik

Not working CPU have a higher resistance ... working go to a lower Resistance

mfg Darkman

 

[emboss]

Sorry, the chip's already back in my computer (light getting too bad). I'll have a look on monday though. One other thing i did notice through the microscope (200x) was that there's tons of copper around the cuts. I did a cut that was much smaller than the laser cut (I didn't want to hit anything I shouldn't) and there was bits of copper all over the place. Certainly not just a thin line across the top. I'm going to have another look to make sure it was copper though. It was possibly that brown OPGA stuff that the old bartons had.

 

[hitechjb1]

Sorry, the chip's already back in my computer (light getting too bad). I'll have a look on monday though. One other thing i did notice through the microscope (200x) was that there's tons of copper around the cuts. I did a cut that was much smaller than the laser cut (I didn't want to hit anything I shouldn't) and there was bits of copper all over the place. Certainly not just a thin line across the top. I'm going to have another look to make sure it was copper though. It was possibly that brown OPGA stuff that the old bartons had.

I think your plan about measuring the voltage subject to bios multiplier change will be more important at this point. Since Deathstar13 and Hoot have measured the resistance of the L3 pins to VCC and VSS, and the result seems to confirm that these L3 pins are connected to active devices in the CPU. Whether the signals on these pins are used or blocked or bypassed is a different story and needs further study.

 

[OC Detective]

guys ive redid my L3's and L2 again for like the 4th time now.
unsuccesfull on both accounts.even scraped the top pcb's pins and connected those with no luck.

hoot i dont know if cutting a bridge will make any differance as connecting sure dont.

People on other forums have already tried cutting/blowing bridges on these locked Barton with absolutely no effect.

 

[Hoot]

Okay, sorry to take so long, but I'm enjoying how much better the new Locked Barton overclocks as opposed to my Unlocked older (week 13) Barton 2600.

I took three CPUs. An Unlocked Tbred2400, Unlocked Barton 2600 and the new Locked Barton 2500. Since the bridges all measure simular and not wishing to post a huge matrix, I'll just concentrate on the L3 (FID2) bridge, which all three have closed.

-------------------2400-----------2600------------2500
(+) on Vss------211.1 ohms---201.8 ohms---221.8 ohms
(-) on Vss-------216.8 ohms---220.3 ohms---251.5 ohms
(+) on Vcc-------216.1 ohms--208.3 ohms---229.6 ohms
(-) on Vcc--------210.5 ohms--217.2 ohms---245.8 ohms

If you give credence to Kirchoff's Loop Law, given that all four measurements on the Locked 2500 have higher resistance than the Unlocked 2400 or 2600, it may be safe to say that there are more paths connected to the L3 bridges in the Unlocked 2400 and 2600 than the Locked 2500. I don't know what's not connected to the L3 bridges on the Locked 2500, but a good candidate might be the inputs to the Multiplier Control decoding circuitry. Only AMD knows for sure...

Hoot

 

[OC Detective]

If thats the case Hoot - then they must be using something different to come up with the 11 multiplier? The various parts of the multi would still have to be in either an on/off state to get to the 11 multi

 

[hitechjb1]

Okay, sorry to take so long, but I'm enjoying how much better the new Locked Barton overclocks as opposed to my Unlocked older (week 13) Barton 2600.

I took three CPUs. An Unlocked Tbred2400, Unlocked Barton 2600 and the new Locked Barton 2500. Since the bridges all measure simular and not wishing to post a huge matrix, I'll just concentrate on the L3 (FID2) bridge, which all three have closed.

-------------------2400-----------2600------------2500
(+) on Vss------211.1 ohms---201.8 ohms---221.8 ohms
(-) on Vss-------216.8 ohms---220.3 ohms---251.5 ohms
(+) on Vcc-------216.1 ohms--208.3 ohms---229.6 ohms
(-) on Vcc--------210.5 ohms--217.2 ohms---245.8 ohms

If you give credence to Kirchoff's Loop Law, given that all four measurements on the Locked 2500 have higher resistance than the Unlocked 2400 or 2600, it may be safe to say that there are more paths connected to the L3 bridges in the Unlocked 2400 and 2600 than the Locked 2500. I don't know what's not connected to the L3 bridges on the Locked 2500, but a good candidate might be the inputs to the Multiplier Control decoding circuitry. Only AMD knows for sure...

Hoot

From your measurement and also from Deathstar13, what we can say is the L3 pins and L1 pins are connected to some semiconductor devices and have active paths to VCC/VSS.

As you pointed out, whether the roughly 20 ohm difference between the locked Barton (being 20 ohms higher) and the 2400/2600 may infer something remains to be thought about.

Apparently, the signals on these pins are not used or bypassed by the actual multiplier driver circuit. That is why,
- Cut, connect of the L3 bridges would not alter internal, actual multiplier (as reported here or else).
- Wire trick from BP_FID pins would not alter internal, actual multiplier, (BP_FID pins indeed connect directly to the L3 pins).


emboss is planning to measure the voltage on these L3 pins by altering multiplier in the bios. But if the CPU internal is not picking up or bypassing these L3 pin signals, even the L3 pin signals can be changed by the bios setting or even wiring tricks, the internal CPU multiplier would not be changed.

 

[tharva]

I don't even remember my name after reading all of this! Hope you guys figure it out!!

 

[deathstar13]

well guys as i can tell from your work,mine looks rather consistant.
i was worried a bit as this isnt my strongest field.wasnt 15 years ago when i was half passed out in my elect. eng. classes lol

anyhow i wont be able to test anything for anyone till sunday night as im outa town with my kids.

on a side note,if and what is controlling the multis is also tied into the extra 256mb L2 cache,its done in the same manner i mean.

if you need any general questions answered from anything ive tried ill be checking back on this thread until i get back home.

hoot btw nice seeing you "on the case" man! been a while since ive seen ya around.

just an idea,if needed.if a sacrificial locked cpu is needed for autopsy in a working status. im gonna be getting rid of this thorton in about 2 weeks(selling in classifieds)or i will just ask a small for consolation donation if it goes this route.so that option wont be high and dry.

 

[Hoot]

It's early and I'm at work, so temper my remarks with the fact that the coffee has not set in after a late night technical session. IE I may be way off in left field. Keep in mind that I'm not a CPU gate-level Engineer.

If you look at the Fab51 approximation of the Multiplier decoding circuitry and assume there is no more complexity (connections) than it portrays. In the arena of "crimes of omission", what could AMD have left off? We know the pull-down resistor is still in the circuit. We know the L3/L1 junctions are physically connected to the appropriate BP_FID pins on the bottom of the CPU. We don't know that the FID Driver register outputs are physically connected to the appropriate FID pins on the bottom, but chances are that they are since if you set the bios for auto-detect, it does come up with an 11x multiplier. We know that in unlocked CPU's, you can change the multiplier by either cutting a bridge or forcing it in the bios. That implies that the combination of the Multiplier control circuitry input pull-up and pull-down resistors, when a bridge is closed, cause a biased logic level zero. By biased, I mean the voltage is not simply a hard short down to zero volts, otherwise the forced logic level from bios coming in on the BP_FID pins could not overide a closed bridge. Stay with me on this... . There's a lot of assumptions coming. Assume that AMD did not isolate the inputs to the Multiplier control circuitry, otherwise we would not see a change in resistance when we changed ohmeter polarity since there would be no semiconductor gating effect, which is assumed to be the reason the resistance changes with metering polarity. What else could be missing? How about the pull-up resistors? What could happen without them? Well, we know that the 1k ohm pull-down resistors would pull down the biased logic level zero voltage at the input to the Multiplier control circuitry even further, perhaps so far that the externally bios forced logic level could not overcome it. A big variable is the question of whether, in the absence of a pull-up resistor, if a bridge is cut, would the load on the path, with the now isolated pull-down resistor missing, be enough to draw down the input so far that even an external, bios forced logic level one would not overcome it? Darn, I lost my train of thought....

Anyway, I'm taking my stereo microscope home for the weekend and armed with a fresh box of x-acto blades, I'm going to cut one of the L3 bridges, micro-solder some 36ga. enameled wire to each side of the bridge as well as one of the uncut bridges on both my unlocked and locked Bartons, then with the CPU in my system, measure what the voltages are in them with the bios set for auto-sense as well as set to force those two BP_PID pins and see what the levels are. If I see the cut bridge on the locked CPU does not pull-up as high as the one on the unlocked CPU, I'll hook up my decade resistance bridge between that line and Vcore and see if an externally supplied pull-up will swing logic level to a one. That's a lot of work and a long stretch, but it would enable us to determine whether the locking could be overcome by simply soldering some fixed value resistors to the bottom of the motherboard on the BP_FID socket pins.

Gotta do my "real" job now. BBL

Hoot

 

[phaedrus]

hoot, you've mentioned the Fab51 approximation of the multi circuit. could you post or host or link a copy of that diagram here? if not, forward it to me via email and i'll post and link it to my web space. i think i see where you were going, but i'd like to see the circuit myself to follow along.

the one thing i'm curious about is logically assuming that resistance values changing with polarity imply that the multiplier circuit is the active circuit attached to the pins. the multi circuit inputs may have other active isolation like buffering, diode or gating, etc.

it just occured to me that the change could conceivably be under the die. if so, it may be hard to see without popping the chip from the package.

are the pull up and pull down resistors on the package or on die?

its like the old einstien and the watch problem. given a watch that can't be taken apart, one can model an equivalance of the watch's function that is reliable in any number of conditions, but there is no guarantee that the model is the same or even similar to the guts of the watch.

i think we're going to need sacrificial lambs, locked and unlocked, eventually. i'll kick in $10 for the butcher's fun, and can provide via paypal. anybody else? also, for some of these ideas to test, seems like a burned or dead locked and unlocked would be helpful. anybody wanna start a new thread looking for handouts?

good (frustrating) work, folks

thx, phaed

 

[UnLoadeD]

I'm always up for a good sacrifice, count me in too 8)

peace.
unloaded

 

[Hoot]

There are two links I have been working with. They are:

http://fab51.fc2web.com/pc/barton/athlon-e23.html#L3
http://fab51.fc2web.com/pc/barton/athlon-e20.html

The pull-down resistor pack is on the package and I don't know where the pull-up is located, probably on die, assuming it even exists and does not rely upon the device from the motherboard driving BP_FID to supply the logic high bias.

FWIW:

AMD defines logic low level as ((Vcore/2)-.3 to.35V) and logic high as ((Vcore/2)+.2 to .3V)

Hoot

 

[hitechjb1]

I think this summaries how the L3 bridge signals, pullup and pulldown multiplier network, ... , in unlocked CPU work.

When a L3 bridge is closed (with connection between the two dots), the input to the multiplier control (call it L3_FID) is low or logic 0.

The L3_FID is the same as the BP_FID by direct connection. Some measurements by deathstar13 showed these L3 pins are still connecting to the BP_FID pins of the CPU in locked CPU.

Hoot, if you may want to confirm this too - the connection from L3_FID to the BP_FID (1st - AN27, 2nd - AL27, 3rd - AN25, 4th - AL25, 5th - AJ27).

The five L3 Barton 2500+ bridge are: close close close close close

So in the past,
if a bridge is close by default (logic 0), one can
- cut a L3 bridge, the L3_FID can go high (logic 1) by internal pullup
- force BP_FID to VCC by wire trick, hence L3_FID becomes logic 1 to multiplier control

Or if the CPU comes with some L3 cut, such as 2600+: open close close close close

If a bridge is open by default (logic 1), one can
- connect the cut bridge, and bring it to logic 0
- force BP_FID to VSS by wire trick, hence L3_FID becomes logic 0 to multiplier control


For locked CPU, forcing signal/voltage change at L3_FID by bridge cutting, connect, wire trick has not been able to change actual multiplier.

There is always a chance even all these are intact, the L3_FID signals are not used by the CPU internal multiplier circuit, or bypassed.

A direct meaurement of voltage at these L3_FID pins subject to
- bridge cut/connect
- wire trick
- bios multiplier setting change
would be able to confirm either
- the L3_FID signals cannot be changed, OR
- the L3_FID signals can be changed, BUT cannot control the actual multiplier

 

[phaedrus]

its funny, but in the model 10 tech doc (amd pub 26237c), the fsb_sense pins (ag31, ah30) work with a motherboard pullup resistor (p.75), not the (almost certain on chip) active pullup on the bp_fid pins (an27,al27,an25,al25,aj27), which incidentally, are listed in the same document as NC.

means to me that amd will not be able to lock FSB without a change in motherboard specification.

so is the multi stuff happening on other NC pins? if the circuit analogue in my first post in this thread is a good logical approximation, it would have to use more (formerly) NC pins. (orignially darkman's assertion)

edit: duh, ag31, ah30 are output pins used for MB auto FSB sense... but if amd had an intention to lock FSB, they would need to account for motherboard differences in clock, and allow a range around the intended, eg, 133 or 166 or 200 +/- *some amount*. that *some amount* would make it difficult...

 

[hitechjb1]

If the assertion that the five L3 pins (L3_FID) are connected to some unknown NC pins, it can be found relatively easily.

Just select ONE L3_pin (one of the five), and measure the resistance to any one of the CPU pins. If there is one pin with ZERO ohm or very low resistance besides the known BP_FID pin, then it is found. It has been checked by deathstar13 that there is connection to BP_FID pins from the L3 pins.

But then, even that additonial pin is found, it would not be useful, since the regular BP_FID pin has not been able to alter multiplier via L3 pins.