ICH delayed transaction

[Lancelot]

(I'm posting this in the Intel CPU section cuz it's Intel chipset specific)

BIOS option "ICH delayed transaction"
This is what it does: The chipset has an integrated 32bit writebuffer to give access to the PCI bus. When this option is enabled, the PCI bus works according the PCI 2.1 specifications.

BUT; should this be enabled or disabled when OCing?!

 

[Rocinante]

I say leave it enabled....

Adrian Rojak explains it as performance enhancement...

http://www.rojakpot.com/default.aspx?location=8&var1=0&var2=58

If your PCI bus is locked at 33mhz, leave it on...

 

[Lancelot]

What you're talking about was called "PCI delayed transaction". I know ICH controls all input-output including PCI, but still is "ICH delayed transaction" the same as as "PCI delayed transaction"?! I can't find any info on this...

 

[FIZZ3]

What you're talking about was called "PCI delayed transaction". I know ICH controls all input-output including PCI, but still is "ICH delayed transaction" the same as as "PCI delayed transaction"?! I can't find any info on this...

It's basically a buffer for failed requests, so that the 2nd attempt to transfer can be completed successfully from this buffer. I would think this smoothes asynchronies in data streams. Without it the device must restart the process all over. Whether it introduces additional latency (extra stage) or not I don't know. It seems a small thingy anyway, but maybe you could simply run some benchmarks with this setting on and off.

 

[Rocinante]

What you're talking about was called "PCI delayed transaction". I know ICH controls all input-output including PCI, but still is "ICH delayed transaction" the same as as "PCI delayed transaction"?! I can't find any info on this...

I would imagine it is....can't give you a definate yes or no...

ICH controls the PCI bus as well as the IDE, SATA, and USB....