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IDT7203 Asyncronous FIFO Memory

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cayla

New Member
Joined
Oct 23, 2016
I am referring to schematics where 8 bit parallel ADC is interfaced to IDT7203 (datasheet can be seen here http://www.kynix.com/Detail/735739/IDT7203.html)Asynchronous FIFO Memory. It is used for storing ADC results. Schematics as shown:
139WH.png

Now if I replace it with sync FIFO buffer (by replacing 8 to 12 bit ADC and 12 or 16 bit memory), Can I do that? Is there any disadvantage to use Synchronous memory?

Thanks in advance.
 

Lochekey

Senior Pink Member
Joined
Sep 13, 2015
This one is above my skill set and I will not even hazard a try. I pinged a member though that might be able to weigh in for your question.
 

Dolk

I once overclocked an Intel
Joined
Mar 3, 2008
Hello Cayla, and :welcome:

You have certainly landed in an odd forum to be asking such a question. Luckily I can help you out with this question but it will require some feedback. First off, this forum is typically centered around overclocking discussion. Not Computer Hardware questions like this.

Now to answer your question, why would you sync your FIFO to your ADC? This seems like a bad idea unless you are setting up for a triggered instance to capture the contents of the ADC not stream the data into the FIFO at all times. For most ADC projects, you would like to stream the contents of the ADC into a ASYNC FIFO, that way your offload processor can always read the contents when it wants to. Now I have worked on projects where the FIFO needs to be synced so that you can work with triggered events. Those being an event where you tell the ADC to sample the immediate time the trigger event occurs. In this case you would want to first put both the ADC and the SYNC FIFO on the same clock system, and the same triggered system. With an ADC synced FIFO, it may be best to upgrade to an FPGA rather than rely on discrete components.
 

JrClocker

AKA: JrMiyagi
Joined
Sep 25, 2015
If you are trying to offload he processor, I would look to see if you can connect the ADC to a DMA channel. Most modern embedded processors let you do some pretty impressive stuff with the DMA. In essence, you can create a FIFO using a DMA channel and a reserved section of RAM.


 

NiHaoMike

dBa Member
Joined
Mar 1, 2013
What sample rate are you trying to run at? I'm guessing pretty low since the 1k resistor is probably going to really limit your bandwidth.
 

Dolk

I once overclocked an Intel
Joined
Mar 3, 2008
What sample rate are you trying to run at? I'm guessing pretty low since the 1k resistor is probably going to really limit your bandwidth.

What?

R95 is a Pull-up resistor with a diode on it to: A) drive the correct current into the MUX @ 5V, and B) make sure the MUX doesn't bleed into the ADC.