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Need Help With Overclocking Issue i7-7700k + G.Skill Memory

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aknewhope

New Member
Joined
Feb 10, 2019
Hello everyone. This is my first post here. I built a rig back in early 2017 (specs below). The issue I'm having is that when I set the XMP profile, I sometimes can't get the PC to POST at all. I press the power button, but the only thing that happens is the power light comes on. No fans spin, and no devices power up. The multi-segment POST code is "00". If I unplug the power cable from my power supply and let all of the LED's die out (about 15-30 seconds), it will then boot and post correctly. This happens as soon as I apply the XMP profile or with the settings below which are XMP applied plus a minor tweak to the CPU clocks and RAM voltage. If I manually set the memory to no higher than 3000 MHz, it works as normal.

Things I have tried:
- Manual tuning of memory (works if I set the frequency below 3000 MHz)
- Powering PC directly from power outlet instead of going through UPS (CyberPower 1500PFCLCD) with no change in behavior.
- I haven't tried re-seating the memory, but I believe it was doing this before I took the whole system apart about a year ago. So in a way I have re-seated it once. It's just a hassle to remove the large cooler to get to the RAM.

Maybe the memory doesn't meet it's spec? Let me know your thoughts.


BIOS has been updated many times but the behavior is still the same.

CPU: Intel Intel Core i7-7700K
Motherboard: ASUS MAXIMUS IX HERO
PSU: Corsair AX860i
GPU: NVIDIA GeForce GTX 1080
OS drive: Samsung SSD 960 EVO 1TB
Memory: 4 x G.Skill F4-3200C16-8GTZB 1600.0 MHz (DDR4-3200 / PC4-25600)



[2019/02/10 10:57:53]
Ai Overclock Tuner [XMP]
XMP [XMP DDR4-3200 16-18-18-38-1.35V]
BCLK Frequency [100.0000]
ASUS MultiCore Enhancement [Auto]
AVX Instruction Core Ratio Negative Offset [0]
CPU Core Ratio [Sync All Cores]
1-Core Ratio Limit [48]
2-Core Ratio Limit [48]
3-Core Ratio Limit [48]
4-Core Ratio Limit [48]
BCLK Frequency : DRAM Frequency Ratio [Auto]
DRAM Odd Ratio Mode [Enabled]
DRAM Frequency [DDR4-3200MHz]
Xtreme Tweaking [Disabled]
TPU [TPU I]
EPU Power Saving Mode [Disabled]
CPU SVID Support [Enabled]
CPU Core/Cache Current Limit Max. [Auto]
Min. CPU Cache Ratio [Auto]
Max CPU Cache Ratio [Auto]
BCLK Aware Adaptive Voltage [Auto]
CPU Core/Cache Voltage [Adaptive Mode]
- Offset Mode Sign [+]
- Additional Turbo Mode CPU Core Voltage [Auto]
- Offset Voltage [Auto]
DRAM Voltage [1.3800]
CPU VCCIO Voltage [Auto]
CPU System Agent Voltage [Auto]
PLL Termination Voltage [Auto]
PCH Core Voltage [Auto]
CPU Standby Voltage [Auto]
DRAM CTRL REF Voltage on CHA [Auto]
DRAM CTRL REF Voltage on CHB [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL0 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL1 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL2 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL3 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL4 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL5 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL6 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL7 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL0 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL1 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL2 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL3 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL4 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL5 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL6 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL7 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL0 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL1 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL2 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL3 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL4 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL5 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL6 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL7 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL0 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL1 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL2 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL3 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL4 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL5 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL6 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL7 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL0 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL1 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL2 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL3 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL4 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL5 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL6 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL7 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL0 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL1 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL2 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL3 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL4 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL5 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL6 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL7 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL0 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL1 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL2 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL3 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL4 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL5 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL6 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL7 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL0 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL1 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL2 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL3 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL4 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL5 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL6 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL7 [Auto]
FCLK Frequency for Early Power On [Auto]
Initial BCLK Frequency [Auto]
BCLK Amplitude [Auto]
BCLK Slew Rate [Auto]
BCLK Spread Spectrum [Auto]
BCLK Frequency Slew Rate [Auto]
DRAM VTT Voltage [Auto]
VPPDDR Voltage [Auto]
DMI Voltage [Auto]
Core PLL Voltage [Auto]
Internal PLL Voltage [Auto]
PLL Bandwidth [Auto]
Eventual DRAM Voltage [Auto]
Eventual CPU Standby Voltage [Auto]
Eventual PLL Termination Voltage [Auto]
Eventual DMI Voltage [Auto]
Maximus Tweak [Auto]
DRAM CAS# Latency [16]
DRAM RAS# to CAS# Delay [18]
DRAM RAS# ACT Time [38]
DRAM Command Rate [Auto]
DRAM RAS# to RAS# Delay L [Auto]
DRAM RAS# to RAS# Delay S [Auto]
DRAM REF Cycle Time [Auto]
DRAM Refresh Interval [Auto]
DRAM WRITE Recovery Time [Auto]
DRAM READ to PRE Time [Auto]
DRAM FOUR ACT WIN Time [Auto]
DRAM WRITE to READ Delay [Auto]
DRAM WRITE to READ Delay L [Auto]
DRAM WRITE to READ Delay S [Auto]
DRAM CKE Minimum Pulse Width [Auto]
DRAM Write Latency [Auto]
tRDRD_sg [Auto]
tRDRD_dg [Auto]
tRDWR_sg [Auto]
tRDWR_dg [Auto]
tWRWR_sg [Auto]
tWRWR_dg [Auto]
tWRRD_sg [Auto]
tWRRD_dg [Auto]
tRDRD_dr [Auto]
tRDRD_dd [Auto]
tRDWR_dr [Auto]
tRDWR_dd [Auto]
tWRWR_dr [Auto]
tWRWR_dd [Auto]
tWRRD_dr [Auto]
tWRRD_dd [Auto]
TWRPRE [Auto]
TRDPRE [Auto]
tREFIX9 [Auto]
OREF_RI [Auto]
MRC Fast Boot [Auto]
Clean Memory [Enabled]
DRAM CLK Period [Auto]
Memory Scrambler [Enabled]
Channel A DIMM Control [Enable both DIMMs]
Channel B DIMM Control [Enable both DIMMs]
MCH Full Check [Auto]
DLLBwEn [Auto]
DRAM SPD Write [Disabled]
XTU Setting [Auto]
DRAM RTL INIT value [Auto]
DRAM RTL (CHA DIMM0 Rank0) [Auto]
DRAM RTL (CHA DIMM0 Rank1) [Auto]
DRAM RTL (CHA DIMM1 Rank0) [Auto]
DRAM RTL (CHA DIMM1 Rank1) [Auto]
DRAM RTL (CHB DIMM0 Rank0) [Auto]
DRAM RTL (CHB DIMM0 Rank1) [Auto]
DRAM RTL (CHB DIMM1 Rank0) [Auto]
DRAM RTL (CHB DIMM1 Rank1) [Auto]
DRAM IOL (CHA DIMM0 Rank0) [Auto]
DRAM IOL (CHA DIMM0 Rank1) [Auto]
DRAM IOL (CHA DIMM1 Rank0) [Auto]
DRAM IOL (CHA DIMM1 Rank1) [Auto]
DRAM IOL (CHB DIMM0 Rank0) [Auto]
DRAM IOL (CHB DIMM0 Rank1) [Auto]
DRAM IOL (CHB DIMM1 Rank0) [Auto]
DRAM IOL (CHB DIMM1 Rank1) [Auto]
CHA IO_Latency_offset [Auto]
CHB IO_Latency_offset [Auto]
CHA RFR delay [Auto]
CHB RFR delay [Auto]
ODT RTT WR (CHA) [Auto]
ODT RTT PARK (CHA) [Auto]
ODT RTT NOM (CHA) [Auto]
ODT RTT WR (CHB) [Auto]
ODT RTT PARK (CHB) [Auto]
ODT RTT NOM (CHB) [Auto]
ODT_READ_DURATION [Auto]
ODT_READ_DELAY [Auto]
ODT_WRITE_DURATION [Auto]
ODT_WRITE_DELAY [Auto]
Data Rising Slope [Auto]
Data Rising Slope Offset [Auto]
Cmd Rising Slope [Auto]
Cmd Rising Slope Offset [Auto]
Ctl Rising Slope [Auto]
Ctl Rising Slope Offset [Auto]
Clk Rising Slope [Auto]
Clk Rising Slope Offset [Auto]
Data Falling Slope [Auto]
Data Falling Slope Offset [Auto]
Cmd Falling Slope [Auto]
Cmd Falling Slope Offset [Auto]
Ctl Falling Slope [Auto]
Ctl Falling Slope Offset [Auto]
Clk Falling Slope [Auto]
Clk Falling Slope Offset [Auto]
CPU Load-line Calibration [Auto]
CPU Current Capability [Auto]
CPU VRM Switching Frequency [Auto]
VRM Spread Spectrum [Auto]
CPU Power Duty Control [T.Probe]
CPU Power Phase Control [Auto]
DRAM Current Capability [100%]
DRAM Power Phase Control [Extreme]
DRAM Switching Frequency [Auto]
CPU Core/Cache Boot Voltage [Auto]
DMI Boot Voltage [Auto]
Core PLL Boot Voltage [Auto]
CPU System Agent Boot Voltage [Auto]
CPU VCCIO Boot Voltage [Auto]
CPU Standby Boot Voltage [Auto]
Intel(R) SpeedStep(tm) [Disabled]
Turbo Mode [Enabled]
Long Duration Package Power Limit [Auto]
Package Power Time Window [Auto]
Short Duration Package Power Limit [Auto]
IA AC Load Line [Auto]
IA DC Load Line [Auto]
CPU overclocking temperature control [Disabled]
AVX Instruction Core Ratio Negative Offset [0]
Hyper-Threading [Enabled]
Thermal Monitor [Enabled]
Active Processor Cores [All]
Intel Virtualization Technology [Disabled]
Hardware Prefetcher [Enabled]
Adjacent Cache Line Prefetch [Enabled]
Boot performance mode [Auto]
SW Guard Extensions (SGX) [Software Controlled]
Tcc Offset Time Window [Disabled]
Execute Disable Bit [Enabled]
SMM Code Access Check [Enabled]
SMM Use Delay Indication [Enabled]
SMM Use Block Indication [Enabled]
Intel(R) SpeedStep(tm) [Disabled]
Turbo Mode [Enabled]
CPU C-states [Enabled]
Enhanced C-states [Enabled]
CPU C3 Report [Enabled]
CPU C6 Report [Enabled]
CPU C7 Report [CPU C7s]
CPU C8 Report [Enabled]
Package C State Limit [Auto]
CFG Lock [Disabled]
Intel(R) Speed Shift Technology [Enabled]
Number of P states [0]
Acoustic Noise Mitigation [Disabled]
Disable Fast PKG C State Ramp for IA Domain [FALSE]
Slow Slew Rate for IA Domain [Fast/2]
Disable Fast PKG C State Ramp for GT Domain [FALSE]
Slow Slew Rate for GT Domain [Fast/2]
Disable Fast PKG C State Ramp for SA Domain [FALSE]
Slow Slew Rate for SA Domain [Fast/2]
Configurable TDP Boot Mode [Nominal]
Configurable TDP Lock [Disabled]
CTDP BIOS control [Disabled]
Power Limit 1 [0]
Power Limit 2 [0]
Power Limit 1 Time Window [0]
ConfigTDP Turbo Activation Ratio [0]
Overclocking Lock [Disabled]
PCI Express Native Power Management [Disabled]
PCH DMI ASPM [Disabled]
ASPM [Disabled]
DMI Link ASPM Control [Disabled]
PEG - ASPM [Disabled]
PTID Support [Enabled]
PECI Access Method [Direct I/O]
PCI Express Native Power Management [Disabled]
BDAT ACPI Table Support [Disabled]
Wake system from S5 [Disabled]
ACPI Debug [Disabled]
Low Power S0 Idle Capability [Disabled]
Lpit Recidency Counter [SLP S0]
Intel Ready Mode Technology [Disabled]
PCI Delay Optimization [Disabled]
ZpODD Support [Disabled]
PEP CPU [Enabled]
PEP Graphics [Enabled]
PEP ISP [Disabled]
PEP SATA [Storage Controller]
PEP UART [Enabled]
PEP I2C0 [Enabled]
PEP I2C1 [Enabled]
PEP I2C2 [Enabled]
PEP I2C3 [Enabled]
PEP I2C4 [Enabled]
PEP I2C5 [Enabled]
PEP SPI [Enabled]
PEP XHCI [Enabled]
PEP Audio [Enabled]
PEP EMMC [Enabled]
PEP SDXC [Enabled]
VT-d [Disabled]
Primary Display [Auto]
iGPU Multi-Monitor [Disabled]
DMI Max Link Speed [Auto]
PCIEX16/X8_1 Link Speed [Auto]
PCIEX8_2 Link Speed [Auto]
PCIe Spread Spectrum Clocking [Auto]
IOAPIC 24-119 Entries [Enabled]
PCIe Speed [Auto]
Hyper kit1 Mode [Disabled]
Hyper kit2 Mode [Disabled]
SATA Controller(s) [Enabled]
SATA Mode Selection [AHCI]
S.M.A.R.T. Status Check [Enabled]
Aggressive LPM Support [Disabled]
SATA6G_1(Gray) [Enabled]
Hot Plug [Disabled]
SATA6G_2(Gray) [Enabled]
Hot Plug [Disabled]
SATA6G_3(Gray) [Enabled]
Hot Plug [Disabled]
SATA6G_4(Gray) [Enabled]
Hot Plug [Disabled]
SATA6G_5(Gray) [Enabled]
Hot Plug [Disabled]
SATA6G_6(Gray) [Enabled]
Hot Plug [Disabled]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 0 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 1 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 2 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 3 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 4 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 5 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Port 6 [Enabled]
Hot Plug [Disabled]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 6 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Port 7 [Enabled]
Hot Plug [Disabled]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 7 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
PCI Express Root Port 1 [Enabled]
Topology [Unknown]
ASPM [Disabled]
L1 Substates [Disabled]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE1 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE1 LTR Lock [Disabled]
PCIE1 CLKREQ Mapping Override [Default]
PCI Express Root Port 2 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE2 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE2 LTR Lock [Disabled]
PCIE2 CLKREQ Mapping Override [Default]
PCI Express Root Port 3 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE3 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE3 LTR Lock [Disabled]
PCIE3 CLKREQ Mapping Override [Default]
PCI Express Root Port 4 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE4 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE4 LTR Lock [Disabled]
PCIE4 CLKREQ Mapping Override [Default]
PCI Express Root Port 5 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE5 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE5 LTR Lock [Disabled]
PCIE5 CLKREQ Mapping Override [Default]
PCI Express Root Port 6 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE6 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE6 LTR Lock [Disabled]
PCIE6 CLKREQ Mapping Override [Default]
PCI Express Root Port 7 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [7]
Reserved Memory [17]
Reserved I/O [16]
PCH PCIE7 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE7 LTR Lock [Disabled]
PCIE7 CLKREQ Mapping Override [Default]
PCI Express Root Port 8 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [7]
Reserved Memory [17]
Reserved I/O [8]
PCH PCIE8 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE8 LTR Lock [Disabled]
PCIE8 CLKREQ Mapping Override [Default]
PCI Express Root Port 9 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE9 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE9 LTR Lock [Disabled]
PCIE9 CLKREQ Mapping Override [Default]
PCI Express Root Port 10 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE10 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE10 LTR Lock [Disabled]
PCIE10 CLKREQ Mapping Override [Default]
PCI Express Root Port 11 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE11 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE11 LTR Lock [Disabled]
PCIE11 CLKREQ Mapping Override [Default]
PCI Express Root Port 12 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE12 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE12 LTR Lock [Disabled]
PCIE12 CLKREQ Mapping Override [Default]
PCI Express Root Port 13 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE13 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE13 LTR Lock [Disabled]
PCIE13 CLKREQ Mapping Override [Default]
PCI Express Root Port 14 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE14 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE14 LTR Lock [Disabled]
PCIE14 CLKREQ Mapping Override [Default]
PCI Express Root Port 15 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE15 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE15 LTR Lock [Disabled]
PCIE15 CLKREQ Mapping Override [Default]
PCI Express Root Port 16 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE16 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE16 LTR Lock [Disabled]
PCIE16 CLKREQ Mapping Override [Default]
PCI Express Root Port 17 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE17 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE17 LTR Lock [Disabled]
PCIE17 CLKREQ Mapping Override [Default]
PCI Express Root Port 18 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE18 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE18 LTR Lock [Disabled]
PCIE18 CLKREQ Mapping Override [Default]
PCI Express Root Port 19 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE19 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE19 LTR Lock [Disabled]
PCIE19 CLKREQ Mapping Override [Default]
PCI Express Root Port 20 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE20 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE20 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
PCI Express Root Port 21 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE21 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE21 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
PCI Express Root Port 22 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE22 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE22 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
PCI Express Root Port 23 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE23 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE23 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
PCI Express Root Port 24 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE24 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE24 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
Audio DSP [Disabled]
HDA-Link Codec Select [Platform Onboard]
iDisplay Audio Disconnect [Disabled]
PME Enable [Disabled]
SerialIO timing parameters [Disabled]
TPM Device Selection [dTPM]
PTP aware OS [PTP Aware]
Me FW Image Re-Flash [Disabled]
Local FW Update [Enabled]
HECI Timeouts [Enabled]
Force ME DID Init Status [Disabled]
CPU Replaced Polling Disable [Disabled]
ME DID Message [Enabled]
HECI Retry Disable [Disabled]
HECI Message check Disable [Disabled]
MBP HOB Skip [Disabled]
HECI2 Interface Communication [Disabled]
KT Device [Enabled]
IDER Device [Enabled]
End Of Post Message [Send in DXE]
D0I3 Setting for HECI Disable [Disabled]
Select Camera [Ivcam]
Delay needed for Ivcam power on [0]
Delay needed for Ivcam power off [0]
Rotation [0]
DFU support [Disabled]
Wake support [Disabled]
ASF support [Enabled]
USB Provisioning of AMT [Disabled]
Activate Remote Assistance Process [Disabled]
CIRA Timeout [0]
PET Progress [Enabled]
WatchDog [Disabled]
OS Timer [0]
BIOS Timer [0]
Secure Erase mode [Simulated]
Force Secure Erase [Disabled]
MEBx hotkey Pressed [Disabled]
MEBx Selection Screen [Disabled]
Hide Unconfigure ME Confirmation Prompt [Disabled]
MEBx OEM Debug Menu Enable [Disabled]
Unconfigure ME [Disabled]
Non-UI Mode Resolution [Auto]
UI Mode Resolution [Auto]
Graphics Mode Resolution [Auto]
Thunderbolt(TM) Support [Disabled]
Thunderbolt(TM) PCIe Support [Disabled]
Security Device Support [Enable]
Security Device Support [Enable]
SHA-1 PCR Bank [Enabled]
SHA256 PCR Bank [Enabled]
SHA384 PCR Bank [Disabled]
SHA512 PCR Bank [Disabled]
SM3_256 PCR Bank [Disabled]
Pending operation [None]
Platform Hierarchy [Enabled]
Storage Hierarchy [Enabled]
Endorsement Hierarchy [Enabled]
TPM2.0 UEFI Spec Version [TCG_2]
Physical Presence Spec Version [1.3]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Onboard LED [Enabled]
Q-Code LED Function [POST Code Only]
ErP Ready [Disabled]
Restore AC Power Loss [Power Off]
Power On By PCI-E/PCI [Disabled]
Power On By RTC [Disabled]
HD Audio Controller [Enabled]
PCIEX4_3 Bandwidth [X2 Mode]
M.2_1 Configuration: [Auto][SATA mode][PCIE mode] [Auto]
M.2_2 PCIe Bandwidth Configuration: [X2][X4] [X2]
Asmedia Back USB 3.1 Controller [Enabled]
Asmedia Front USB 3.1 Controller [Enabled]
USB Type C Power Switch [Auto]
RGB LED lighting [On]
In sleep, hibernate and soft off states [On]
Bluetooth Controller [Enabled]
Wi-Fi Controller [Enabled]
Intel LAN Controller [Enabled]
Intel LAN PXE Option ROM [Disabled]
Detect Non-Compliance Device [Disabled]
Primary PEG [Auto]
Primary PCIE [Auto]
Network Stack [Disabled]
Legacy USB Support [Enabled]
USB Keyboard and Mouse Simulator [Disabled]
Generic-SD/MMC/MS/MSPRO 1.00 [Auto]
USB3.1_EC2 [Enabled]
USB3.1_EA3 [Enabled]
USB3_1 [Enabled]
USB3_2 [Enabled]
USB3_3 [Enabled]
USB3_4 [Enabled]
USB3_5 [Enabled]
USB3_6 [Enabled]
USB_7 [Enabled]
USB_8 [Enabled]
USB_9 [Enabled]
USB_10 [Enabled]
USB_13 [Enabled]
USB_14 [Enabled]
Hide Asus Logo [Disabled]
CPU Temperature [Monitor]
MotherBoard Temperature [Monitor]
PCH Temperature [Monitor]
T_Sensor1 Temperature [Monitor]
EXT_Sensor1 Temperature [Monitor]
EXT_Sensor2 Temperature [Monitor]
EXT_Sensor3 Temperature [Monitor]
WATER_IN Temperature [Monitor]
WATER_OUT Temperature [Monitor]
CPU Fan Speed [Monitor]
Chassis Fan 1 Speed [Monitor]
Chassis Fan 2 Speed [Monitor]
Chassis Fan 3 Speed [Monitor]
AIO PUMP Speed [Monitor]
HAMP Fan Speed [Monitor]
CPU Optional Fan Speed [Monitor]
W_PUMP+ Speed [Monitor]
Extension Fan 1 Speed [Monitor]
Extension Fan 2 Speed [Monitor]
Extension Fan 3 Speed [Monitor]
WATER_FLOW Speed [Monitor]
CPU Core Voltage [Monitor]
3.3V Voltage [Monitor]
5V Voltage [Monitor]
12V Voltage [Monitor]
CPU Q-Fan Control [Auto]
CPU Fan Step Up [0 sec]
CPU Fan Step Down [0 sec]
CPU Fan Speed Lower Limit [200 RPM]
CPU Fan Profile [Standard]
AIO_PUMP/W_PUMP+ Control [Disabled]
Chassis Fan 1 Q-Fan Control [Auto]
Chassis Fan 1 Q-Fan Source [CPU]
Chassis Fan 1 Step Up [0 sec]
Chassis Fan 1 Step Down [0 sec]
Chassis Fan 1 Speed Low Limit [200 RPM]
Chassis Fan 1 Profile [Standard]
Chassis Fan 2 Q-Fan Control [Auto]
Chassis Fan 2 Q-Fan Source [CPU]
Chassis Fan 2 Step Up [0 sec]
Chassis Fan 2 Step Down [0 sec]
Chassis Fan 2 Speed Low Limit [200 RPM]
Chassis Fan 2 Profile [Standard]
Chassis Fan 3 Q-Fan Control [Auto]
Chassis Fan 3 Q-Fan Source [CPU]
Chassis Fan 3 Step Up [0 sec]
Chassis Fan 3 Step Down [0 sec]
Chassis Fan 3 Speed Low Limit [200 RPM]
Chassis Fan 3 Profile [Standard]
HAMP Fan Control [Auto]
HAMP Fan Source [CPU]
HAMP Fan Step Up [0 sec]
HAMP Fan Step Down [0 sec]
HAMP Fan Speed Low Limit [200 RPM]
HAMP Fan Profile [Standard]
Extension Fan 1 Q-Fan Control [DC Mode]
Extension Fan 1 Q-Fan Source [CPU]
Extension Fan 1 Speed Low Limit [200 RPM]
Extension Fan 1 Profile [Standard]
Extension Fan 2 Q-Fan Control [DC Mode]
Extension Fan 2 Q-Fan Source [CPU]
Extension Fan 2 Speed Low Limit [200 RPM]
Extension Fan 2 Profile [Standard]
Extension Fan 3 Q-Fan Control [DC Mode]
Extension Fan 3 Q-Fan Source [CPU]
Extension Fan 3 Speed Low Limit [200 RPM]
Extension Fan 3 Profile [Standard]
Fast Boot [Enabled]
Next Boot after AC Power Loss [Normal Boot]
Boot Logo Display [Auto]
POST Delay Time [3 sec]
Boot up NumLock State [Enabled]
Above 4G Decoding [Disabled]
Wait For 'F1' If Error [Enabled]
Option ROM Messages [Enabled]
Interrupt 19 Capture [Enabled]
Setup Mode [Advanced Mode]
Launch CSM [Enabled]
Boot Device Control [UEFI and Legacy OPROM]
Boot from Network Devices [Legacy only]
Boot from Storage Devices [Legacy only]
Boot from PCI-E/PCI Expansion Devices [Legacy only]
OS Type [Other OS]
PCH SATA Boot Only [Disabled]
USB Boot [Enabled]
Watchdog Support [Disabled]
Setup Animator [Disabled]
Load from Profile [1]
Profile Name []
Save to Profile [1]
CPU Core Voltage [Auto]
VCCSA Voltage [Auto]
BCLK Frequency [Auto]
CPU Ratio [Auto]
Cache Ratio [Auto]
Bus Interface [PCIEX16/X8_1]
 
Last edited:

Johan45

Benching Team Leader Super Moderator
Joined
Dec 19, 2012
Could be partly due to having 4 sticks, try setting the system agent voltage to 1.25 and the IO voltage to 1.2 could also add 0.005 volts to the RAM so 1.355v or 1.36V if these small bumps don't help you can also try updating BIOS
 
OP
A

aknewhope

New Member
Joined
Feb 10, 2019
I've heard that about 4 sticks before and wasn't aware of that when I purchased the memory. I guess if nothing else works I can try removing 2 of the sticks.

Regarding the voltages:

- When you say IO voltage are you referring to CPU VCCIO?
- On this motherboard I can set specific voltages for boot only. Do you recommend setting these only for boot?
- I already have the memory voltage at 1.38 (has no effect currently). I will try lowering it when I make the other adjustments.
 

Johan45

Benching Team Leader Super Moderator
Joined
Dec 19, 2012
Yes the VCCIO and VCCSA and they should be just below where you set core and RAM voltages
It is possible that you hav a bad stick or even a bad slot on the mobo which we'll test next if voltage adjustments don't work
 
OP
A

aknewhope

New Member
Joined
Feb 10, 2019
I'm not sure yet because the computer has to sit for a day or so in the shutdown state in order for this issue to show itself. If I reboot or shutdown and power on in the same day it always works. I will report back in a few days.
 

Johan45

Benching Team Leader Super Moderator
Joined
Dec 19, 2012
Might be a good idea for you to change the CMOS battery
 
OP
A

aknewhope

New Member
Joined
Feb 10, 2019
It seems changing VCCSA and VCCIO fixed the issue. The rig has been sitting for more than a day twice now and booted up each time without issue. It's nice to boot my PC without having to get under my desk to unplug the power supply for 30 seconds every time. Thanks for your help. :)