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P4!!! This And That

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o-clock-547

Member
Joined
Mar 25, 2002
Location
Boston
ok i notice some kind of association with the letter a and the 400 bus and the letter b and 533, help me i've been out of this stuff for a lil while now, so i;m behind
so a 2.4b is at 533 bus??
and a 2.4a is a 400 bus?
what other variables or any thing else u can tell me about p4's
i know they have 512 l2 cache, but whats up with l1
how many copper interconnected layers are there?
could a and b be different cores?
how many piplines
ANything else, GETTIN GEEKY AGAIN!!!
 

looktall

Member
Joined
Jul 28, 2002
Location
perth.wa.au
hmmm

the A doesn't signify 400 bus speed. it is used to differentiate between willamette core P4's and northwood core P4's (both of which have a 400mhz bus speed.) of the same speed.

the B is to differentiate between 400mhz northwoods and 533mhz northwoods, not just to show it has a 533 bus speed.
if there isn't a 400 fsb and a 533 fsb chip of the same speed, then there will not be a B tagged on the end of it.
eg. 2.2ghz is a 400mhz northwood and 2.26ghz is a 533mhz northwood.
in reality, there is only one B chip. the 2.40B, but it is not uncommon for all 533 chips to be referred to as x.xxB chips.
 

BaldHeadedDork

Member
Joined
Aug 18, 2002
1) Yep. P4"B" chips default to 533FSB (Quad speed) if the motherboard supports it, and P4"A" cpu's run at 400FSB. But you can overclock some of the "A" chips to 600FSB, so the default setting doesn't mean a whole lot for final overclocking performance.

2) The hot variable at the moment is the C1 stepping (midlife revision) of the P4 lineup. All P4's at 2.50 and above 2.53 are C1 chips, which allegedly have a little more headroom for overclocking. Allegedly, because the C1 version of the older chips is taking forever to go into production (Intel is running out old inventory first) so there haven't been any head-to-head comparisons yet.

3) They do have 512K of L2 cache running at the processor speed. You don't hear a lot about the L1 cache because it doesn't affect application use, its for the internal operation structure of the chip. So yes, it has an L1 memory cache, and that's all that matters.

4) How many copper interconnected layers? I'd guess a lot, but that's just a guess. The Northwood P4's (and the new Celeron) is the first chip from Intel to be made on the 0.13 micron die. That (with the heat spreader) gives the P4 an edge in cooling over the Athlon.

5) The 400 and 533 chips aren't different cores. There are only very minor differences between the two.

6) Not a clue on the number of pipelines.

7) Anything else? Hang out for a while, read a lot of the threads, and you'll be a P4 expert in no time.


BHD
 

NookieN

Member
Joined
Jul 14, 2002
Location
The West
Sounds like everyone else explained A/B 400/533 pretty well.

As for L1, the current P4's all have 8k data and 12k uop trace instruction caches. The trace cache is basically there to keep the instruction decoder busy -- x86 instructions have to be decoded and converted before the P4 can actually do what they're telling it to do.

I think the P4 has 6 metal layers, maybe 7.

A and B chips are not different cores. B0 and C1 steppings are different core revisions however.

The pipeline is 20 stages. Of course some instructions can leave the pipe in less than 20 cycles and some will go through the pipe several times before they're done.

There's a lot else, but we can't really fit it into this space. One thing you left out is thermal throttling. But you can easily enough do a search for that and find out everything you never wanted to know about it.