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Processor Architecture and Types Guide

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Captain Newbie

Senior Django-loving Member
The following post(s) is/are a guide to the various micrprocessors commonly available for x86 and x86-64 operations.

Everything you wanted to know about CPU types...but were afraid to ask!

Pentium 4. There are four major types of Pentium 4 processors, with variations within. The early Pentium 4 processors are built on the Willamette core, which require a 423-pin motherboard (Socket 423). The Willamette did not scale well and was slower than P3's at similar clock speeds. The Willy was also built on a 180-nanometer manufacturing process. The Willamette was later reworked for the "new" Pentium socket-478. The Willy front side bus runs at 100MHz which Intel touts as 400MHz "quad pumped". Willys have 256KB of L2 cache.

Most Pentium 4's that you will find these days are Socket 478--478 pins. This includes the Northwood (in A, B and C versions), the Prescott, and the repackaged Xeon for Socket 478, the P4 Extreme Edition. Pentium 4 processors set at 2.0GHz or less with "A" after their clock speeds are Northwoods set to 100MHz ("400MHz quad pumped"). Northwoods with B following their clock speeds are set to 133MHz front side bus (touted as 533MHz quad pumped). The highest-rated "B" Northwood is at 3.066GHz, and includes hyperthreading as for Northwood-C.

Pentium 4 processors with C following the clock speed are set to 200MHz ("800MHz quad pumped"), are built upon the Northwood core design, and also include symmetric multithreading, which Intel sells as HyperThreading. Hyperthreading allows the Pentiums, which feature long execution pipelines, to more effectively use this pipeline by having two threads in various stages of execution in the various stages of the CPU's pipes. The P4 Northwoods are manufactured on a 130-nanometer process. Additionally, Northwoods have 512KB of L2 cache to help keep the pipeline full.

Overclocked/overvolted Northwoods have a habit of either spontaneously failing (SNDS) or gradually degrading (GNDS). Here is the discussion of SNDS and here is gradual degradation syndrome discussion. It is theorized that repeated removal and reseating of the heatsink weakens the integrated heat spreader's contact with the CPU, causing failure through thermal overload. More in those threads.

The third type of Pentium 4 is widely known as Prescott, and often referred to as Preshott for its high running temperatures. Prescott is manufactured on a 90nm process for socket 478 and touts a long (31 stage compared to Northwood's 24 stage) pipeline. Pentium 4's above 2.0GHz with an "A" following their clock speed are Prescotts set to 133FSB ("533MHz quad pumped") and do not have hyperthreading. All other Prescotts run at 200 FSB and have hyperthreading. Prescott may be re-released for use with Socket 775, Intel's new socket that should be out sometime this year if it hasn't been pushed back. All Prescotts have 1MB of L2 cache, but the Prescott lags behind the Northwood in performance clock per clock.

The newest Prescotts are built upon the 775-land LGA775 interface and use Intel's new model number system (below). A 1066MHz bus Prescott should also be available soon, and chipsets supporting LGA775 and DDR2 are/will be available. BTX? Maybe.

Update Two: Intel is kicking off the processor model numbers :bang head which have absolutely nothing to do with the actual performance of the CPU. The number simply serves as a marketing designation. Here is an interim table (Xbit labs) of the model numbers. Model numbers will be used on Prescott cores, Socket (LGA)775 and later. This demonstrates that Intel is not going to be pushing frequency any more, or as much as they have in the past.

Consolidated Intel FAQ here at OC Forums.

Pentium 4 Cache Size: I have finally figured out how long one of the "micro-operations" for the Pentium 4 is. Intel does not specifiy the actual size of their level 1 instruction trace caches, instead saying n-kuop trace cache. An x86 micro-operation is 72 bits long. Most P4en have a trace cache of 12K uops, which works out to 843Kbits of trace cache. (Conjecture.)

Pentium Mobile: More clock-efficient than most Intel processors, the PM will carry the future of Intel (conjecture). Banias (130nm) and Dothan (90nm) are the two PM versions. I don't have a lot of information on them as yet but they feature large caches and present an alternative approach to the clock cycle scaling.

Xeon. The Xeon is Intel's latest version of their heavy duty server chip. Modern Xeons run on Socket 603/604, usually in SMP configurations. Most Xeons also feature hyperthreading. I do not know much about the Xeon myself but do know that they are robust, if not expensive, processors.

The Pentium 4 Extreme Edition is a repackaged Xeon, built for Socket 478 motherboards, and has a 200MHz ("800 MHz Quad Pumped") front side bus. The P4EE has 2MB of L3 cache, and 512KB of L2 cache.

The Xeon should support some sort of 64-bit extensions starting with the Nocona core, which (conjecture) should be delievered in 2005, if Intel does not jump aboard the iAMD64 bandwagon first.

~~~~~~~~~~~~ AMD Processors ~~~~~~~~~~~

Athlon64*. There are two current types of Athlon-64, AMD's latest and greatest desktop processor. The Athlon 64 FX-51 and FX-53 are the high end chips that require a Socket 940 motherboard (like the Opterons below) normally found in high end servers. The FXen all have 1MB of L2 cache, and are built on the same 64-bit instruction set extensions as the Opteron. All AMD 64-bit processors do not have front side busses per se; their memory controller(s) are integrated directly into the microprocessor die, and perhipheral bus communication is performed with HyperTransport technology. The FXen have two memory controllers for dual-channel DDR, and (at the present time) unfortunately require the use of Registered DDR-SDRAM driving memory costs up. The upcoming Socket 939 platform should not require the use of Registered RAM.

The Athlon64 is a desktop adaptation of the Opteron and are known collectively as "Hammer". The desktop adaptation (Socket 754) is known as ClawHammer internally at AMD while the FX/Opteron are referred to as SledgeHammer. The Socket 940 FX-5n are architecturally identical to members of the Opteron 100 series, with the exception of multipliers. All FXen are multiplier unlocked.

The common desktop Athlon64s require Socket 754 motherboards, and come in several speed varieties: 2800, 3000, 3200 and 3400. These are PR ratings, which show effective theoretical performance compared to...nobody knows*...for the 64-bit Athlons. However, the performance similarities between the A64 3000+ and a Pentium-IV at 3.0 cannot be ignored. AMD Athlon64 processors do not have front side busses, as the memory controllers are integrated into the processors themselves. What they do have is DDR400 memory bus(ses) for communication with RAM, and bidirectional HyperTransport links for communication with the perhipheral busses.

The HyperTransport bus runs at 800MHz bidirectional...or 1600 million transfers per second.

All Socket 754 Athlon64s, excepting the "low end" 2800 and 3000, have 1MB of L2 cache. The 3K and 2.8K have 512K. Newer Athlon64s are based upon the NewCastle core (2800 and 3000).

AMD's latest form factor for the Athlon64 is Socket 939. Socket 939 alleviates one of the key gripes that many people have about the mainstream Athlon64 - that they do not feature a dual channel onboard memory controller. 939's remedy this by adding a second controller, theoretically doubling the processor's memory performance. In practice, an estimated gain of ~85% is seen in memory efficiency (Ref.).

Socket 939 Athlon64s include the 3500 (NewCastle core, 512K L2, 2.2GHz), the 3800 (NewCastle Core, 512K L2, 2.4GHz), and the FX-53 for Socket 939. The FX-53, like all FXen, is multiplier-unlocked.

Mobile Athlon 64s The Mobile Athlon64s are not multiplier unlocked like their Socket 462 ancestors. There are several types of 64M, of varying voltages and heat outputs. The highest rated A64Ms are not really any different from their desktop bretheren, save for that they don't have integrated heat spreaders. These are referred to as DTR or Desktop Replacement processors. The Desktop Replacements run just as a desktop A64 runs and are multiplier-down unlocked, meaning that everything under the top multiplier is unlocked. The second type are the low power mobiles, rated for 35 watts. The 2700 and 2800 are the 35-watt 1.20-volt mobiles. Finally, we have the "true" mobiles - and range from 2800 to 3200.

The Athlon64 mobile processors are multiplier-down locked; i.e. unlocked from default multiplier down for power management purposes. It unfortunately looks that the good days of multiplier-unlocked overclocking are over due to the downlock only features of the new Mobiles.

The AMD PR rating system breaks down when you consider that the Athlon64s at their PR ratings are significantly faster than the "equivalent" Socket-462 AthlonXP processors.

AMD AthlonXP, MP, XP-M Processors from AMD aimed at directly competing with the Intel Pentium III/IV, Xeon, and mobile varieties of Pentium processors, respectively. The XP, MP and XPM all use the same PR-rating system that the -64s use. Athlon XPs, just as their Thunderbird predecessors, are used with Socket 462 motherboards. The PR-rating system was originally introduced for the 32-bit Socket 462 AthlonXP, and in theory the XP's rating system is based upon a 1.0GHz Thunderbird Athlon (3200 is 3.2 times faster than an Athlon 1000, for instance).

Athlon XP processors are based upon varying core designs including Palomino, Thouroughbred (A and B variants), Thorton, and Barton. Palominos are the early XP microprocessors, manufactured on the 180-nanometer process. These processors did not scale or overclock well and are rated between 1500+ and 2100+. They also have 256K of L2 cache and run on a 266MHz (133MHz*2) front side bus frequency.

Thouroughbred processors (A and B revisions) are built on the 130-nanometer process and have the same 256KB of L2 cache as the Palomino. Unlike the Palomino, however, the Tbreds scale better (revision B especially) and range to higher speeds, up to 2800+ (333MHz, 166x2). Tbred processors have either 266 or 333 busses (133, 166x2 respectively) and the -B revisions are good overclockers.

Thortons and Bartons are the latest designs of AthlonXP processors and will likely be the last major 32-bit design manufactured by AMD's microprocessor division (potentially with the exception of the Duron-754, which may not support AMD64 right off the bat) and are designed to compete with the Pentium IV. Desktop Barton XP's have either 333 (166x2) or 400 (200x2) front side busses. Bartons have a 512K L2 cache and are designed for lower frequencies, higher performance, says AMD. Desktop Bartons run all the way up to 3200+ (2.2GHz/400FSB).

Thorton processors are Barton CPU's with half the L2 cache disabled, "speedbinning" them into lower speed grades.

Differences between normal XPs, MPs and XP-M Athlons. "Normal" XP processors are run at top speed, all the time, and those produced after a certain week in 2003 are multiplier-locked. An AthlonMP is an XP with one of the bridges professionally closed and certified for multi-processor (dual) operation. You can make your own MPs by taking an XP and closing a certain L5 bridge == Cheap AMD Duallie! :cool:

The XP-Ms are designed for laptop operation and have the lowest heat dispersion of the AthlonXP line. The XP-mobiles run at various speeds, with a 266 (133x2) FSB at default but they are perfectly capable of much, much more. Mobile XPs also come multiplier unlocked, and many members of these forums have XPM's running in desktop motherboards with great success. The top XP-M's are Bartons and, when taken care of properly, overclock extremely well.

Opteron*: The Opteron is AMD's high end 64-bit server processor, built on the Hammer core with 1MB of L2 cache. Opterons are built on a 130 nanometer process and are for Socket 940 motherboards. The Opterons are akin to the A64s in that they do not have front side busses, the memory controllers (two in this case, just as for the Athlon FX for dual channel DDR) are integrated into the chip, and a bidirectional HyperTransport link is used to communicate between the processor and perhipheral devices on the Opteron 100s. At present, Opterons run between 1.4 and 2.4GHz. AMD does not brand the Opteron with a PR rating as it is expected that the target audience (server builders) will know that these are quite heavy duty chips. These chips require the use of Registered DDR-SDRAM.

The Opteron 2xx and 8xx series are designed for two way and four/eight way symmetric multiprocessing, respectively. Building a box with Opteron 8xx will cost more than my car. :mad: These Opterons have additional HyperTransport links for inter-processor communications.

Here is the consolidated AMD FAQ post. Additionally, anything that Hitechjb1 writes about AMD CPUs is highly reccomended. His extensive work with his Tbred B has taught us a great deal of the science of overclocking. :clap:

Processors with an '*' by their name support the x86-64 extensions. AMD has extended the conventional 32-bit x86 instruction set to include operations that can take place on operands that are up to 64 bits long, meaning that they can manipulate unsigned values directly that are smaller than 2^64.

To decide what kind of processor is right for you, you need to know what you want the system to do.


*Footnote: I do not want to come right out and say that the "PR" stands for "Pentium Rating"; however, it is impossible to ignore the near-coincidental release dates of certain AMD/Intel products.

Errors should be submitted to me by private message. I am still making this into a fully workable document, and day-to-day changes may be made for the forseeable future as roadmaps change.

Revisions:
Apr. 19, 1650PDT. Changed "signed" to "unsigned" in discussion of 64-bit values.
Apr. 19, 1739PDT. Fixed P4EE cache quantity from 1MB to 2MB
May 16, 1625PDT. Fixed P4EE cache information AGAIN, mentioning L2 and L3 sizes. Added the AthlonXP/MP. Moved to separate thread.
May 16, 2026PDT Changed A64 cache sizes to reflect what actually is. Added conjectural Xeon 64-bitness; nothing from either chip company is for certain :rolleyes:
...2107PDT: Changed the PR ratings for AMD processors to reflect what actually is.
May 17, 1558PDT. Rewrote Opteron/Athlon-64 section to be more readable and coherent. Corrected Athlon64/Opteron core designations. Added "highest P4B..." HyperThreading.
5/25/04 - Added conjecture about P4 level-1 I-trace cache size.
6/1/04 - Added Socket 939 CPUs. In a later edit, also added Socket 754 mobiles.
6/12 - Edited Socket 939 stuff again.
6/17 - Added LGA775 processors. Still looking for a good explanation to Intel model numbers.
5/6 - More changes. Will soon add information about model numbers directly to this page instead of referring to xbit.
 
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"Consumer" processors.

In the world of "consumer" processors, there are really only two names, with a third company becoming an increasingly smaller minority.

Celeron. The Intel Celeron processors are traditionally based upon the various performance and desktop processor cores, "neutered" through reductions in cache RAM. The modern Celerons are based upon the Socket 478 Pentium IV Northwood. The Northwood Celerons are manufactured on the same 130 nanometer process as the Northwood P4, but have only 128K of L2 cache and a 400 (100x4)MHz front side bus. Earlier Pentium IV-based Celerons are built upon the Willamette core (180-nanometer) and have the same amount of L2 cache. Modern Celerons run between 1700 and 2800MHz and suffer mightily from the reduced cache size as the NetBurst architecture used in Intel CPUs is highly dependent upon cache SRAM to keep the pipes full. However, the majority of the market will buy a 2.8 Celeron over a P4 2.4C simply because 2.4<2.8 and the Celeron is what's on all the Dell commercials every night on the TV.

Celeron-D (Intel): The "new" Celeron from Intel is based on a neutered Prescott core (Prescott-256), with 256K of L2. The new Celeron demonstrates a marked improvement against the old neutered Northwoods and run at a 533 (133x4) bus, and are fabriated on 90-nano just as the Prescotts are. Celeron-D also implements the Intel model number scheme :bang head found here (Xbit labs, until a table can be constructed here). Celeron-D will be Socket 478 for some time to come.

Duron. The Duron is AMD's Celeron of sorts. Compared to the Celeron, the Duron has a very small marketshare. AMD is emphasizing the slower end of the AthlonXP line more with their OEMs than they are the Duron. New Durons are built upon the Applebred core, run between 1400 and 1800 MHz on a 266 (133x2) FSB and have 64K of L2 cache. Comparatively speaking, the Duron puts out lower heat than the rest of the XP line. Granted, it's slow, but a Duron box can be used just as well IF NOT BETTER for productivity applications as a Celeron could.

Sempron (AMD) - Take an Athlon64, switch off 64-bitness, switch off some cache and you have the Paris/Palerno (130/90 nm respectively) cores for the Sempron. Semprons feature some of the benefits of the K8 technology, including on-chip memory controllers, HyperTransport, etc. The first Semprons will be bult for Socket 462, which has me scratching my head, but later Semprons will be for Socket 754. Speeds will probably range between 2600+ and 3100+.

VIA C-series. There are many components and cores in the C-series, but the first worth mentioning is internally referred to as the Samuel "C5B", sold as a C3 by Via. The C3 series of processors are built on a 370-pin PGA370 (Celeron/Pentium III) socket and range from speeds of 500 to ~1400MHz. Early C3's (Samuel C5Bs) have a scant 64K of L2 cache and use either a 100 or 133MHz system bus and are fabricated on a 150-nanometer process. Later C3 processors--Ezra--are fabbed on 130nm technology, retain the socket 370 package, and are basically no different than Samuel C5B except for a lower power requirement than the already low C5B. There are EVEN LOWER POWER versions of the most recent C3 Nehemiah (1000-1400MHz) called Antaur, optomized for extreme low-power and low thermal output applications. C3's are characterized by poor chipset support (most C3 are integrated with their motherboards), low clock speeds, and poor mathematics-intensive (FPU) operations. That said, the C3, as the Celeron and Duron do, has its market. The C3 is great for low-temperature operations and low-power requirements and, with proper case airflow, can be passive heatsink cooled.

Errors, additions, and conjecture as to future products should be submitted to me by private message or e-mail.

Revisions (And I thought this was perfect!)
May 17, 1603PDT: Added Duron at 1.8.
May 28, 1658PDT: Added VIA to the list.
July 5, oh-dark-hundred: Added Celeron D and Sempron
 
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Excellent post!

The 2800 is a speedbinned 3000, with half the cache disabled therefore justifying the lower rating
But, unless something's changed, the 3000+ is a 512k part running at 2.0GHz, and the 2800+ also a 512k part, but clocked at 1.8GHz.
 
Stuff That's Coming, Glossary of Terms
(Conjecture)

Upcoming AMD products. Assuming that all goes well o'er yonder hill in AMD-land, Socket 939 platforms should be available in, at best, early June of 2004. AMD officially says that the Socket 939 platform will be launched for revenue "2H04"--which, at the time of this writing, we are still two weeks short of. Socket 939 is a native dual-channel DDR1-SDRAM platform, eliminating one of the principle differences between the Athlon64 and the AthlonFX. The AthlonXP platform should live on in the form of Paris (130-nm) and Palerno (90nm), for an as yet to be announced socket. However, it has been said that the newest AthlonXPs will be built for Socket 754, and use HyperTransport and onboard DDR controllers just like the full fledged A64s.

It has also been said that AMD will adaopt YET ANOTHER socket type for Athlon64--the Toledo core may be built upon a 900-pin socket, no doubt for DDR2 purposes. Each revision to a memory standard will require a change in at LEAST the processor's internal design, if not the socket it sits in.

AMD has also announced that dual-core Opteron microprocessors--true superscalar--should be available in 2005. Hector Ruiz (CEO) even goes as far to say that the Opteron-Dual will be pin compatible with the current Opteron 1xx/2xx/8xxen. However, by this time a new socket revision may be required to use DDR2, IF AMD decides to adopt the new memory standard sometime in late '04.

Future of Intel. Currently researching but I have some conjecture already.

As many of you have heard Intel is going to stop trying to ramp clock speeds, with the canning of P5 Tejas and P6 Nehalem. LGA775 Prescotts should be available in June. BTX may or may not take off; I find it highly unlikely that a standard such as BTX, tailored only to the needs of Intel's Preshott, will take off and become popular.

Due to the failures of successive P4 designs (Willamette, Prescott) and leakage current issuses Intel will start looking at other methods of improving their microprocessor designs. Pentium-M technology may become the future of the company since the PM is quite clock efficient, low power and low heat. I have a feeling that Intel will be able to solve issues with leakage current in 90nm but will not be able to continue to scale clock speeds; we seem to have found a limit judging from the relatively recent lack of frequency increases. 3.400 seems to be it. Dual core and x86-64 (iAMD64) support will probably be a cornerstone as well.

Intel is going to a model number system (arr). Inital press releases from Intel make this quite confusing on consumers, just as how a Celly 2.6 is slower than a P4B/C 2400.

Glossary of Terms and Pipeline Concepts
In no particular order at all...

Cache A cache is an area of memory for the processor to store either recently used or upcoming instructions, or processed data. Caches are in levels, ranked by where the processor control circuits look for instructions. The first is L1 cache, split into two types: Instruction (I) and Data (D). L1 cache is also the smallest of the caches. L2 cache is much larger (between 256K and 1MB, depending on your CPU) and is the second place that the controller looks for an instruction or data. The third is L3 cache (found mostly on Xeons and on the P4EE), and is the third place the controller looks, .... The reason that cache is so important is it helps keep the processor's execution pipeline full. The difference between really technical cache types (trace caches, for instance) is beyond the scope of this document.

Execution Pipeline The pipeline is the process the CPU goes through to execute an instruction from start to finish. Complex pipelining concepts, such as data hazards, branch hazards, ...., are beyond the scope of this document, but the general rule of thumb is that the longer an execution pipeline, the higher the clock frequency has to be to perform in competition with a processor at lower frequency with small, compact and efficient pipeline. This, in part, is how AMD processors match Intel Pentium processors that have higher internal frequencies. There are a handful of very fundamental problems with long pipelines that demonstrate the microprocessor design law that less is more, but first, branch prediction must be explained.

Branch Prediction One could think of a micrprocessor as an assembly line, with various stages in the execution pipeline (below) that have instructions in various stages of execution throughout. The problem is that, unlike an assembly line, the CPU's direction of execution can change, through both conditional branch and unconditional jump. We will discuss the former. To reduce performance loss, pipelined computers use branch prediction to determine whether execution should continue at the instruction after the branch instruction, or at the branch target address. Modern branch prediction is something like ~95% accurate. However, that 5% miss rate is still significant because the processor must flush--clear out--all the instructions in the pipeline, and start anew. The longer the pipeline, the longer it will take to flush (one clock per stage).

Problems with long pipelining. Thus, we can come to the first problem with long pipelining: A longer pipeline takes longer to flush on a missed branch prediction.

The second problem is that, when one lengthens the processor pipeline (Prescott) and keeps the clock speed constant, performance will drop since an instruction will take longer to traverse the pipeline.

LGA, PGA, ...GA LGA (Land Grid Array) and PGA (Pin Grid Array) refer to the mounting of the processor die on the motherboard. Almost all mainstream modern processors are some variety of PGA, be it uPGA (micro-PGA - Intel 478) or OPGA (organic PGA - AMD). The next generation of Intel processors will be mounted on a LGA package, with the pins in the motherboard itself. Bent pins, anyone? Another type of mounting is BGA--ball grid array--not currently found on any x86 platform. BGA is found on PowerPC and other "different" processors.

Manufacture Process Microprocessors are manufactured by using photolithography to etch the circuits onto the wafer of silicon. Manufacturing processes are described by the wavelength of light used to etch the circuits on the die. In theory, the smaller the light wavelength, the smaller the die size, since each logic gate gets smaller. One can cram more circuits onto the die with a smaller process. The microcomputer industry has had successive successes with process advances (from, say, 250 nanometer to 180 nanometer to 130 nanometer processes) until they arrived at 90nm. The ninety-nano process, for reasons of electophysics that elude me, is not following the trend. The 90nm Prescott, for instance, has double the transistors of the Northwood (130) in half the surface area, but runs warmer that its predecessor on a larger process.

More coming soon.

Revisions:
31 May 04, 1115 PDT - Revision 1A - Added Intel conjecture. Still reasearching.
1334 PDT - Revision 1B - Added a glossary and pipeline concepts.
 
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Originally posted by Captain Newbie The common desktop Athlon64s require Socket 754 motherboards, and come in several speed varietys: 2800, 3000, 3200 and 3400. These are PR ratings, which compare the performance of that chip relative to a 1 gigahertz AMD Athlon Thunderbird (released when work per clock cycle between Intel and AMD was roughly equivalent).

You should also mention that an Athlon64 3000+ is significantly faster than an XP 3000+. Personaly, I dont think the 64 is based on the tbird, or they would give them rediculous PR's like 4000+'s.
 
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nice :)

"These are PR ratings, which show effective theoretical performance compared to...nobody knows.."

Means "pentium rating" trust me on that.:)
 
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Captain Newbie said:
The FXen all have 1MB of L2 cache, and are built on the same 64-bit Hammer core as the Opteron.

.....

Opteron*: The Opteron is AMD's high end 64-bit server processor, built on the Hammer core with 1MB of L2 cache.
Not a zillion percent sure, but I believe the Opteron/FX uses the SledgeHammer core, while the normal A64s use the Hammer core.

But I'd need confirmation since I don't really follow CPUs :D
JigPu
 
Looks like good sticky material to me, although you might want to add that the highest speed P4B had HTT - the 3.06GHz P4B.
 
Not a zillion percent sure, but I believe the Opteron/FX uses the SledgeHammer core, while the normal A64s use the Hammer core.
That sounds right from what I remember, but I'm not totally sure either.

Another vote for a sticky.
 
Re: Re: Processor Architecture and Types Guide

JigPu said:

Not a zillion percent sure, but I believe the Opteron/FX uses the SledgeHammer core, while the normal A64s use the Hammer core.

But I'd need confirmation since I don't really follow CPUs :D
JigPu
Did some more (minor) checking, and it looks like the Opteron/FX are SledgeHammer, A64 is ClawHammer, and both can be collectivly referred to by Hammer.

JigPu
 
Very nice work Captain. I'm not very up to date on cpus but I enjoyed reading it. Gotta be a sticky.

Keep it up.
 
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