OCZ 4800 Plarinum Elite.
Beta BIOS 704-2BTA
Genie BIOS Setting
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>DRAM Configuration Press Enter
FSB Bus Frequency 300
LDT/FSB Frequency Ratio x3.0
LDT Bus Transfer Width d16u16
CPU/FSB Frequency Ratio x10.0
PCI eXpress Frequency 101MHz
K8 Cool'n'Quiet Support Disable
xCool'n'Quiet MAX FID Auto
CPU VID StartUp Value 1.425V
CPU Core Voltage 1.48V
LDT Bus Voltage 1.30V
Chip Set Voltage 1.70V
DRAM 2.5 Voltage 2.74V
CPU VID Control 1.375V
CPU VID Special Control Above VID * 110%
LDT Voltage Control 1.30V
Chip Set Voltage Control 1.70V
DRAM Voltage Control 2.70V
DRAM+ .03V If it's not 3.2V Disable
PCI eXpress Configurator X2 X1 X16 X1
MAC Lan Disabled
MAC Media Interface Pin Strap
Machine MAC (NV) Address Disabled
xMAC (NV) Address Input Press Enter
MAC Lan Boot ROM Disabled
Internal Phy SATA 1/2 Enabled
Internal Phy SATA 3/4 Disabled
VIA 1394 Control Disabled
MARVELL GigaLAN Control Disabled
Run Mem Test 86+ Disabled
DRAM Configuration
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DRAM Frequency Set (MHz) 200 (DRAM/FSB:1/01)
Command Per Clock (CPC) Enabled
CAS Latency Control (Tcl) 2.5
RAS# to CAS# delay (Trcd) 04 Bus Clocks
Min RAS# active time (Tras) 08 Bus Clocks
Row precharge time (Trp) 03 Bus Clocks
Row cycle time (Trc) 08 Bus Clocks
Row refresh cyc time (Trfc) 16 Bus Clocks
Row to Row delay (Trrd) 03 Bus Clocks
Write recovery time (Twr) 03 Bus Clocks
Write to Read delay (Twtr) 02 Bus Clocks
Read to Write delay (Trwt) 03 Bus Clocks
Refresh period (Tref) 3120 Cycles
DRAM Bank Interleave Enabled
DQS Skew Control Increase Skew
DQS Skew Value 0
DRAM Drive Strength weak 3
DRAM Data Drive Strength Level 3
Max Async Latency Auto
DRAM Response Time Fast
Read Preamble Time Auto
Idle Cycle Limit 256 Cycles
Dynamic Counter Disable
R/W Queue Bypass 16x
Bypass Max 04x
32 Byte Granularity Disable (4 Bursts)
This is with the CPU and RAM at 303MHZ .
and this is at 10x300MHz. Note: Temps are while Priming.