What Does A CPU Consist Of?

[daNo-]

Thats my question . I've been wondering what it really consists of.. its parts and functions etc...

Its a new subject to me

 

[Emericana]

silicon... ceramique... i think?

 

[jonspd]

http://www.amdboard.com/amdid.html

I think barton's and tbred are this Organic Pin Grid Array or something made of some kind of organic material.



Yea what he said silico0n.

 

[daNo-]

Well, .. maybe i should rephrase the question... I didn't mean it that way.. I meant What does it consist of such as calculations, operations etc.. How does the CPU function ..

 

[Crash893]

sand

gold

some other trace elements


new ones have copper and some have aluminam in them

 

[daNo-]

.............. I meant the question in the way of How does the cpu process data.. how does it function... that way

 

[jonspd]

sry but you care If I ROFLMAO for a min.

It act's like the mainhouse for all your info that flow's from the ram, vedio card, NB,SB, hard drive, etc. If you are realy wanting a detailed description of exactly how each pin on the cpu work's I dunno but I will keep my eye on this post for the answer.

 

[daNo-]

yea i laughed myself I was looking for a more detailed answer..

All i know is there are two parts : The control unit, and the arithmetic logic unit. t_t

 

[TC]

Try this:
http://www97.intel.com/scripts-tji/index.asp

 

[Gnufsh]

links:

http://computer.howstuffworks.com/microprocessor.htm

http://arstechnica.com/paedia/c/cpu/part-1/cpu1-1.html

 

[MameXP]

OK so you're interested in knowing how a chip is built ? how it functions (executing instructions ) ...

If you look in details, a chip in gerneral contains LOTS of gates such as MUXs, ALUs, Registers.....

I recommend you to buy this book: Computer Organization & Design by John L. Hennessy Stanford University, Morgan Kaufmann Publishers, inc

This book will take you from understnad a basic gate operation to complicated intructions execution involving memory and registers. It also has info on how in general CPUs interact with I/O other devices.

If you dont understand stuff while you reading it, feel free to PM me. I can send some practice questions if you want.

Have fun!
MameXP

 

[MameXP]

Oh also this book will cover pipeline implementation, how it works and the advantages and problems (ie. Structure Hazards, Control Hazards, and Data Hazards).

MOREOVER, it will explain you about Bus-Connected Multiprocessors (SMP) and Network-Connected Multiprocessors (Clustering)

..............Thats it for now
MameXP,

 

[hitechjb1]

A CPU is a very complex electronic machine, so it can be looked at in terms of different views, or different level of abstractions. This is not a complete list, just to show what are the key components. For technical details, each would require its own detail descriptions, totally 1-2 years college level study probably.

1. Atomic scale:
- silicon (diffusion)
- impurity doping
- polysilicon
- silicon dioxide (gate oxide)
- metal wires (Al then, Cu now), metal contacts, …
- insulation
...

2. Electronic component level:
- N-type FETs (field effect transistor)
- P-type FETs
- diodes
- capacitors
- small amount of resistors, …
Typically of the order of tens of millions transistors, few 100 millions capacitors, ~ 100 millions wire segments, ...
E.g. Palomino has 37.5 million, Tbred A and B have 37.2 and 37.6 millions respectively.

Intersection of polysilicon and diffusion forms a transistor.
Typically, for 0.13 micron (or 130 nm) technology (Tbred B/Barton)
- length of transistor = 130 nm
- width of transistor = 1 to 10 times of length, up to few 100 times
- gate oxide thickness 2 - 3 nm
(1 nm = 1/1000000000 meter)

3. Circuit and transistor level:
- static CMOS logic
- dynamic logic (precharge and compute)

4. Gate level or logic level:
- inverter
- nand
- nor
- exclusive-or
- mux
- latch
- register
- clock drivers
- tri-state drivers
…
Typically of the order of 100 different types in actual chip design

5. Functional block level:
- instruction decode unit(s)
- instruction control unit(s)
- instruction execution unit(s)
- address generation unit(s)
- floating point unit(s) (add, multiply)
- scheduling units for above
- high speed registers
- many register files
- SRAM caches
- clock generator and distribution
- bus interfaces
- chip I/O drivers
- more and more units will be integrated into a CPU in future technology
...

6. Chip or package level
- chip carrier or package
- signal pins, control pins, voltage pins VCC, VSS, ...
- capacitors, resistors, ...
- optional bridges (that overclockers are familiar with)

 

[MameXP]

hitechjb1, good post. I think thats what he want to know. "What does a CPU consist of? "

MameXP

 

[daNo-]

Wow guys im really impressed

 

[MRip]

Anybody know how the incredibly precise manufacturing process can vary enough to produce chips with max frequencies hundreds of mhz apart when each chip should theoretically be identical?

 

[hitechjb1]

...

2. Electronic component level:
- N-type FETs (field effect transistor)
- P-type FETs
- diodes
- capacitors
- small amount of resistors, …
Typically of the order of tens of millions transistors, few 100 millions capacitors, ~ 100 millions wire segments, ...
E.g. Palomino has 37.5 million, Tbred A and B have 37.2 and 37.6 millions respectively.

Intersection of polysilicon and diffusion forms a transistor.
Typically, for 0.13 micron (or 130 nm) technology (Tbred B/Barton)
- length of transistor = 130 nm
- width of transistor = 1 to 10 times of length, up to few 100 times
- gate oxide thickness 2 - 3 nm
(1 nm = 1/1000000000 meter)

...

A transistor is a rectangular shape with length, width and thickness (gate oxide) described above. The gate oxide thickness is very thin, and will be getting thinner and thinner in the future, e.g. 90 nm SOI (San Diego), 65 nm technology, approaching 10 atoms or so thickness.

The channel length of a transistor to gate oxideness thickness currently is around 40-60 to 1, it dictates how fast a transistor can run. The channel width of a transistor to its channel length is typically 1 to 20, can be up to 1000 times.

As an anology about how transistors are laid out in silicon surface of a chip, we can look at them this way:

A transistor is like a bath towel laying on the ground, all the towels have about the same length (channel length, shorter side), but they may have very different width. Some are short (square shape), but some are much longer than the other. The thickness of the towel is very thin compared to the other two dimensions, analoguous to a transistor oxide thickness.

- Each towel is laid down with their edges parallel or orthogonal to the other towels.
- Each towel does not overlap with the other towels.
- Each towel is separated from the other towels by certain distance, about 1 to 2 times the length (shorter side) of the towel.

- There are about 40 millions of the transistors (these towels) in a CPU (e.g. Tbred B has 37.6 millions transistors in 130 nm technology).
- On top of the very thin gate oxide, the gate of a transistor is made up of polysilicon which is shaped like a rectangular bar. The base of the polysilicon gate covers the gate oxide area, separating the source and drain of the underlying silicon diffusion region of the transistor.

If putting all these on earth, how big an area would that be?

I estimate it would be about:
Assume a towel occupies about 1 meter length (including separation space)
1 meter / 130 nm = 8000000 = 8 x 10^6

Tbred B CPU size = 84 mm^2

Were a transistor the size of a towel,
The area needed for a Tbred B = 84 x 8 x 10^6 x 8 x 10^6 = 5.4 x 10^15 mm^2 ~ 2000 sq miles
(1 sq mile = 2.6 x 10^12 mm^2)

Size of Rhode Island = 1212 sq miles

Maths should be correct, pls check.

 

[Cuda]

Anybody know how the incredibly precise manufacturing process can vary enough to produce chips with max frequencies hundreds of mhz apart when each chip should theoretically be identical?

Gremlins?

Naw, I believe it has to do with the atomic level hitechjb1 mentioned earlier and the variations on that level as a wafer or other wafers is/are produced.

 

[hitechjb1]

Anybody know how the incredibly precise manufacturing process can vary enough to produce chips with max frequencies hundreds of mhz apart when each chip should theoretically be identical?

Even the CPU and transistors were coming from the same silicon manufacturing process (e.g. 130 nm technology), the channel length and other parameters of the transistors could vary, as a result, ...

Lower voltage, shorter transistor channel length, lower transistor threshold voltage and Tbred B 1700+/1800+DLT3C

The Tbred B 1700+ can perform so well in general, as reported by so many people, such coincidence is not just by luck. I think it has something to do with its intrinsic transistor properties, resembling some future trends for silicon scaling into future generations, namely, lower voltage, shorter transistor channel length, faster transistors for the good, but higher leakage current for the bad.

There are process variations of a given silicon manufacturing process, as in any manufacturing process. As a result, the intrsinic silicon proporties, such as transistor channel length and width, gate oxide thickness, silicon carrier doping, transistor threshold voltage, leakage current, random manufacturing defects, ..., of a chip in a silicon wafer can vary to certain extent (sigma variation). As further scaling down, statistical variation comes into play, i.e. nearby transistors with the same design attribute in the same chip/wafer can even behave differently.

A more interesting question is what the implications of these wafer properties of lower threshold voltage and shorter channel length due to process variation of a manufacturing process are, as I suspect for the the Tbred B DLT3C. It is being rated at lower Vcore but it can run faster than other Tbred B at same voltage. Even it is manufactured with 0.13 micron like other Tbred B, it is effectively behaving like a chip with less than 0.13 micron, resembling the future generation trend.

As the transistor size (channel length) of future generations of silicon chips are scaled down to, e.g., 90, 65, 45, ... nano-meter (nm) (e.g. Hammers are 90/130 nm SOI, TBred B is 130 nm, Palomino is 180 nm), the supply voltage, transistor channel length and threshold voltage will be lowered accordingly. Even the supply voltage is lower, the transistors run faster, both current and power density also increase (actual trend). As the transistors are scaled down, logic gate delay decreases, both the active power density (W/cm^2) and the passive leakage power density (from both gate and subthreshold leakage) increase.

The passive leakage current component increases at an even faster pace than the active current, posing problems on cooling and power dissipation for future generations of chips. If this trend continues, the high passive, standby leakage current will lead to high power drawn and high idle CPU temperature, compared to today's CPU, even when the system is idle and the CPU is not under heavy load.

For more details about the low voltage Tbred B 1700+, refer to
Why the 1700+ can run so fast at low Vcore?


What is channel length of a MOS transistor (page 14)