Recently, AMD revised its revisions datasheet to add new steppings (at least publicly) for the first time in a long time.
You can find the entire document here.
The only page of interest to most of you is reproduced here (page 8):
Let’s cherry-pick the data we need:
We see from this chart that what we refer to as Athlon 64 “Venice” chips are AKA DH-E3 AKA 00020FF0h chips.
CPU-Z verifies this:
As you see, the “Family, Model, Stepping” number are F-F-0.
Moving on, we see that FX/A64 “San Diego” chips are AKA SH-E4 AKA 00020F71h chips.
This GCPUID readout (CPU-Z v. 1.29 doesn’t identify the stepping correctly) confirms this (and also tells us that the FX-57 is not a new stepping or revision for AMD; it’s the same as the other San Diegos).
As you see, the “Family, Model, Stepping” number are F-7-1.
Finally, the chart tells us that there are/will shortly be two E6 steppings.
There is the JH-E6 revision, which looks to be just for dual-core processors. For Athlon 64 X2 processors, it will have a CPUID of 00020F32h.
And so it does:
The other E6 revision is the DH-E6 revision, which will have a stepping of 00020FF2h (for A64s and Semprons).
No, we don’t have a CPUID picture of that yet, because it hasn’t shown up yet, but when it does, the CPUID-type programs will spit out “Family, Model, Stepping” numbers of F-F-2 rather than the current F-F-0.
AMD never documents these kind of things way in advance, so if a few aren’t already in the pipeline, they will be pretty shortly. I would at worst they’ll show up around the same time as x86-64 enabled Semprons, sometime in July.
Will these run faster than the current Venice chips? Maybe, maybe not, but there’s at least a chance of it.