This link will take you to a review of Intel’s future beefed-up PIVs with 2Mb cache, but that’s not what’s important to see.
What is important for the typical person reading this is the third graph on the page. It shows Intel’s lineup for 2005, with the features each processor will (and will not) have, including EM64T (Intel’s version of x86-64).
Take a look at the Celeron section. No EM64T there.
This contradicts what Intel said about it a month ago.
If you don’t recall why you should care about this, get up to speed. In all likelihood, we won’t see x86-64 enabled Semprons before x86-64 enabled Celerons get announced.
Roadmaps can of course be old, and are always liable to be outdated, but this does cast some doubt into whether or not Intel will do this like they said.
We’ll continue to keep an eye on this.