... memory performance is sort of a bit player when it comes to system performance as a whole. If you look back to the 286 platform, there were no caches, either on the cpu or on the motherboard. In situations like this, the performance impact of memory is direct. Gains in memory performance produce a faster system, and losses in it produce a slower one, in nearly direct porportion.
As time advanced, so did system architechture. The i386 processor family still had no memory caches on the cpu, but a common feature of later 386 chipsets was that of a cache made of commercially available SRAM DIPP chips, 32, 64, 128, or 256KB in size. This helped performance in its own right, but also ushered in an era of decreased dependance on the performance of the memory subsystem.
The i486 cpu took the idea to a new level. i486s integrate an 8KB memory cache on the cpu itself, a measure that produces much higher cache bandwidth and reduced latency as compared to the standard SRAM DIPP implmentations common on later 386 systems. This, in high performance 486 systems, was assisted by SRAM DIPPS on the motherboard. This brings the L1 and L2 terminology into play, with the cpu's cache being L1 (Level 1) and the motherboards being L2.
The Pentium series of cpus brought a doubling of the L1 cache size to 16KB, with the later PentiumMMX doubling it again to 32KB. These systems almost uniformly implemented the L2 cache on the motherboard as well, although there were very basic systems that did not. When EDO ram superceeded FPM types, propoganda was that the increase in memory performance EDO brought would obviate the need for this L2 cache. This was of course a lie, as although by this time the effects of changes in memory performance had very subtle affects, the loss of the L2 cache had marked effect.
The PentiumII processor had L1 cache integrated onto the processor die itself, as did the Pentium and 486 processors, but moved towards integration of the L2 cache, as well. P2s have the L2 cache still composed of commercial SRAM, but it was placed on a special circuit board along with the processor die itself. This arrangement, dubbed the "Slot 1" processor by Intel, was dominant for several years, with i820 being the last Intel Slot 1 chipset.
Early P3 processors were fundamentally no different than P2's with SRAM chips for L2 cache. But the later P3's, known as Coppermine, finally introduced the topology that survives to the present. The L2 cache was fully integrated into the processor's die, making the circuit board arrangement of Slot 1 unecessary, and setting the stage for the return to a simple socket affair like have been used prior to Slot 1 and since.
The point of all this? Well, as mentioned earlier, cache reduces the performance impact of changes in the memory subsystem performance on the performance of the system as a whole. And with each of these progressions in cache technology, the effect becomes more prevalent.
Today we have L1 caches of subtance, and really large L2 caches, carved from the same lightening-fast silicon as the cpu core iteself, and integrated into it. Cache hit rates are so high, and the latency so low, that it takes huge differences in memory performance to really amount to much in terms of the performance of the system as a whole. Even switching between single and dual channel memory, as comparision of S754 and S939 A64 sytems clearly shows, has only a modest impact on performance. The caching is so effective that it almost entirely removes dependance on the performance of the memory subsytem.
Kinda of annoys me. I only lose 600 on my sandra memory score and 1 second on superpi (because its out of sync maybe? or is it the 600 bandwidth)
