Actually the 5C gradient between IHS (true IHS temp not cpu diode) and cores is an error which I helped to start 2 years ago in Realtemp thread, based on an intel white paper, that had a scaleless graph. Two errors were made, one by me in assuming scale of graph was in units of one, to this day we still dont know units (and even if units are scale of one, that is from cpu diode to core temps, nothing to do with IHS temp). Second error, dont know who started that one, was assuming cpu diode (which is in the cores and no where near IHS) is any approximation of IHS.
Kevin (unclewebb) started realtemp because coretemps were based on mobile cpus (as tj specs not published for desktops at the time) and some clearly seemed off on the 45nms. He used IHS temps at idle, undervolted and assumed a nearly 0C gradient. The intel white paper seemed to agree, as did measuring gradient through just an IHS as only 1-2C. This intel paper even got computronix to change his guide from 15C avg gradient from case to core to 5C, so I even helped to screw up his guide
. (later learned that much of gradient is through the core itself, the core is copper banded silicone with thermal conductance of ~120W/MK vs copper IHS at 400 W/Mk, and the tim 1 solder joint though ~50-80 W/Mk is so thin at 10-20um not much gradient through that)
KTE was the only one arguing 2 years ago, that tcase specs = tjmax specs. In other words, at full tpd load, a cpu with stock cooler and stock tested conditions when tjmax is reached (example here 100C), the IHS would be 68C, ie tcasemax, in other words gradient would be 32C in that case. But it was 3 against 1, so we won the argument
, or KTE just started ignoring us (though turns out KTE was correct, as we found out a year later).
Then came the stanford article, clearly showing 15-30C gradient from core to IHS depending on the load. This is not same as the gradient from core to cpu diode (which is still in core and no where near IHS temp as still have to go through more core, then tim1 than IHS).
Then after the dilemma and I had an E8400 with intel published tjmax of 100, I milled hole in IHS and tested that way. In initial disbelief, I got another and drilled through IHS and part way into core to measure IHS vs partway into core. Ended up drilling five cpus, all pics/videos in realtemp thread on xtreme. Later others on xtreme drilled holes and got same gradients.
Turns out Unclewebbs measurement is valid and accurate for approximating tjmax, providing use 5C difference between core and IHS at 2-6W TDP, idle undervolted, instead of near 0C gradient.
But at load, KTE was spot on, no question as TDP increases (seems like just basic math now...but oh well), so does the gradient, so at load, near full TDP there will be 20-30C gradient from IHS to core (gradient will obviously vary cpu to cpu), so cpu/tcase specs are not helpful, have to go by tjmax specs of 100C when using tj temps.
Here is video, showing first the ~7-8C gradient at stock idle (undervolted is 5C, stock voltage idle is 7-8C), vs 20-24C gradient at linx load from core temp using tjmax 100C (known for E8400) vs calibrated thermocouple in IHS (accurate to within +/- 0.1C per factory calibration of surface temp).
YouTube- idle, then load, gradient from tjmax to IHS thermocouple
Here is stanford paper showing same gradient varying between 15C to 30C from core to heatspreader dependent on loading program and TDP, and was about 5C at idle.
1st black line (from bottom) is ambient
2nd black line is IHS (thermocouple)
3rd black line is cpu temp diode sensor
then multipe grey lines representing core temps in various hotspots in cpu, ie where dts sensors are now located in modern cpus, instead of just central diode.
Low tdp load programs like art, roughly only 5-6C between IHS and cpu temp and another 5-6C from cpu diode to core temps, ie max 10-12C from IHS to core.
High tdp load program like gzip, there is almost 30C gradient from IHS to core.