I posted this over at xtreme as well, but while responding to Beepbeep listing manufacture tim specs (which are often exaggerated like fan specs), I found something interesting, last quote in post...
And to add to what DilTech said, you cant go by manufactures data bulk conductivity for tim, some are as accurate as fan specs. There is bulk thermal conductivity, interface resistance, and most importantly non-standard testing. For example AS5 I think lists their tim as 8 w/mK, yet has been tested on actual cpus to be less than 1 w/mk by both NREL and other reputable testers. Shin itsu and Dow was consistently measured as highest at ~ 4 w/mK on more than one study, and they accurately list their as such. Found NREL, page 9,
http://www.nrel.gov/docs/fy08osti/42972.pdf . Any manufacturer that lists TIM paste as performing higher than 6 w/mK, better come with independent proof, not saying its not out there, but certainly havent seen any proof yet. phase change/indigo materials/thermoplastics aside.
I will try to find that power point slide from intel I posted somewhere in this forum couple years ago, but their solder attach was updated in past few years, and melting point was 150C, thermal cond ~80 w/mk.
But as listed above post from Tech report, to me, pretty much sums it up...
However, Intel claims the combination of the new interface material and Ivy's higher thermal density is responsible for the higher temperatures users are observing with overclocked CPUs.
And for those that dont think TIM matters with large resistance changes, quote from
http://www1.eere.energy.gov/vehicle...anced_power_electronics/ape_10_narumanchi.pdf slide 15
At 100 W/cm2 heat dissipation in the die, the maximum junction temperature (TJ,max) decreases by 16°C when TIM resistance decreases from 100 to 8 mm2K/W