AMD FSB vs. Intel FSB Question

I heard that AMD cuts their FSB in BIOS in half vs. Intel meaning, an Intel CPU running at 400 FSB will say 400 FSB in BIOS as opposed to an AMD CPU running at 400 FSB will show 200 FSB in BIOS.


Is this correct?

no intel would say their proc runs at 800 but in bios it would say 200 bbecause intel is quad pump....

The EV6 bus that AMD uses on the K7 series of processors (the same one used on the DEC Alpha) transfers data twice per clock cycle, making a 200MHz FSB effectively a 400MHz FSB (more or less). Intel actually manages to get a 200MHz FSB to transfer data 4 times per clock cycle (They actually use two out of phase clocks each transfering twice per clockcycle) for an effective 800MHz FSB (more or less). In dual cpu situations, each AMD CPU sits on it's own EV6 bus, where as Intel uses a shared bus. Most bioses on the boards we use will give the base (actual) clock frequency, rather than the effective.

Why doesn't AMD use the same method as Intel?

well (in my opinion) Amd does not really want to persure the "me too" bit at the moment it is pretty much focused on it's 64bit program. unless they r using this already on their 64bit processors 400x4 fsb=1600 i have vague knowledge of these

TheNewbie said:

well (in my opinion) Amd does not really want to persure the "me too" bit at the moment it is pretty much focused on it's 64bit program. unless they r using this already on their 64bit processors 400x4 fsb=1600 i have vague knowledge of these

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I read that some how they say it is upto 1600 mhz for A64, but don't know the technical reasons either.

As for why they aren't running 800 fsb vs 400 there must be more of a valid reason then the "me too" theory. I'm sure their R&D is capable of working on 64 and 800 FSB if it yielded desirable results.

Its not like they can just redesign the Athlon at this point either. So maybe 400 bus was the best solution at the time of developement and they use hyper transport now. They probably weren't able to develope it for Athlon and had a superior system for A64 so there was no need to use the Intel 800 FSB method.

I'd sure like to know how the AMD 400 FSB performs vs the Intel 800 FSB because its definitly not twice as fast like people claim for several reasons. Just like most theoretical bandwidth maximums that are well above the actual bandwidth because no system is going to have the ideal situation were it can utilize 100% of the bandwidth. Its like max wattage on a generic power supply.

Anyway, I'd sure like to know how the performance of the two compare and what the reasons for it are. i.e. I think AMD has better latency so it performs faster then Intels 400 FSB.

I search for 2 hours last night and I'll be damned if I could find a decent article conparing the two.

lol well thanks for shedding more darkness on this situation. I thaught I did a good enough job of, but yeah i'm sure they could have made a Athlon of that nature if they "had too" for competitiveness


If you find a good review compairing the two send a link my way

TheNewbie said:

lol well thanks for shedding more darkness on this situation. I thaught I did a good enough job of, but yeah i'm sure they could have made a Athlon of that nature if they "had too" for competitiveness


If you find a good review compairing the two send a link my way

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lol, its like freakin midnight with no moon. Either there just isn't much info on the subject or I am really stupid and not using the right key words for searching. More likely its the later, so I'll try some new phrase combos and different wording

lol yeah i'm looking to now the infection has spread .

Tom's Hardware
http://www20.tomshardware.com/cpu/20030923/athlon_64-03.html

seems to be good info.

So, my AMD 2700+ running OC'd at 200FSB is, in effect, running at 400FSB? That was the reason for the question. I didn't want to push anymore than 400FSB and it sounds like I'm there right now.

yes you have succeeded

OC Noob said:

I read that some how they say it is upto 1600 mhz for A64, but don't know the technical reasons either.

As for why they aren't running 800 fsb vs 400 there must be more of a valid reason then the "me too" theory. I'm sure their R&D is capable of working on 64 and 800 FSB if it yielded desirable results.

Its not like they can just redesign the Athlon at this point either. So maybe 400 bus was the best solution at the time of developement and they use hyper transport now. They probably weren't able to develope it for Athlon and had a superior system for A64 so there was no need to use the Intel 800 FSB method.

I'd sure like to know how the AMD 400 FSB performs vs the Intel 800 FSB because its definitly not twice as fast like people claim for several reasons. Just like most theoretical bandwidth maximums that are well above the actual bandwidth because no system is going to have the ideal situation were it can utilize 100% of the bandwidth. Its like max wattage on a generic power supply.

Anyway, I'd sure like to know how the performance of the two compare and what the reasons for it are. i.e. I think AMD has better latency so it performs faster then Intels 400 FSB.

I search for 2 hours last night and I'll be damned if I could find a decent article conparing the two.

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The Athlon 64's overhead(eg. useless bandwidth) is barely anything at all, while the P4's is uaually around hundreds, if nor gigabytes of bandwidth. Not sure about athlon overhead ATM.

When the K7 arch originally came out , the EV6 bus was far better than intel's solution. Changing he processors' bus would have been a vcery major change to impliment, so they just did it on the next generation. On the K8 they switched to a HyperTransport Bus and an integrated memory controller. I'm alsio not certain if bus technology is part of the AMD/Intel cross-liscensing agreement. If not, then AMD could not use the same solution on their processors (for example IA64 is not part of the cross-liscensing agreement, and you don't see any IA64 AMD chips).

On the K8, the link between the CPU and the memory controller runs at the full speed of the CPU. The HyperTransport bus that connects it to the rest of the system consists of 2 unidirectional 800MHz 16-bit HyperTransport links (soon to move to 1000MHz). THis like also does not have to carry data from the RAM to the CPU as the FSB does on the P4.

TheNewbie said:

Tom's Hardware
http://www20.tomshardware.com/cpu/20030923/athlon_64-03.html

seems to be good info.

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Nice understandable explaination of hyper transport. I don't have time to run through the whole thing now though, but going through the most likely pages to have AMD 400 mhz bus info I didn't see anything. Was there anything on that as well as the 800 mhz intel and hyper transport stuff?


ps a lot of the info in that article may also be biased. Tom is know to be an intel fanboy and I have a hard time believing a P4 EE beat a FX-51 in twice as many tests as the FX won. That and he says the only difference between the Athlon and the A64 is cache and hyper transport when it has more registers and some stuff I have no understanding of. Maybe I just misread skimming through though.

pps So is hyper transport like putting the north bridge in the CPU then?

Oh don't get me started Tommmy boy is very biased (Intel) that whole simulation was a AMD hammer bash fest. And there of that P4 EE (jacked up Xeon) was not even out on the market place at the time so should not be considered in the total finding of it. I wrote then to this effect.

Dear Frank (article editor)


I'm sorry but how can you say that the P4EE is the winner in you're little "contest" should we say when it is nowhere near a position on the market .You stated yourself that it was a review of the P4 EE therefore it should not be taken it in account in the whole findings of the simulation.I usually like your articles and find them very unbiased(lol) but this one takes the cake.It should have been a test on available hardware not on Intels scoundrel jacked up Xeon in P4's clothing.I hope Tom's hardware comes under attack by a vicous HIGHLY destructive virus that completely destroys it. Good day.

P.S. oh yeah and the p4EE they said it beat the Fx-51 by way more than 1/2 they stated that the P4EE won like 50 and the Fx-51 won 15.

OC Noob said:

pps So is hyper transport like putting the north bridge in the CPU then?

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No. AMD did but the memory controller in the CPU core, but that has nothing to do with HyperTransport (which I shall now call HT). THe memory controller resides in K8 CPUs, removing the FSB as a bottleneck as the memory controller now interfaces with the cpu at the full speed of the cpu. This also greatly reduces latency, as requests no longer have to go through the NB.

HT is a high-speed, point-to-point, serial bus for chip-to chip interoonncet. You can check out the HyperTransport Consortium's home page here at http://www.hypertransport.org/ They have a FAQ page you might like to read.

Nvidia used an HT link to connect the Nforce2 NB and SB together. AMD also designed the K8 with several HT interconnects. These are used for inter-CPU communication in multi-CPU situations (And since each CPU has its own memory controller, high-speed interconnects between processors allow very good scaling of bandwidth with number of CPUs) and to connect the CPU to the rest of the system.

Gnufsh said:

No. AMD did but the memory controller in the CPU core, but that has nothing to do with HyperTransport (which I shall now call HT). THe memory controller resides in K8 CPUs, removing the FSB as a bottleneck as the memory controller now interfaces with the cpu at the full speed of the cpu. This also greatly reduces latency, as requests no longer have to go through the NB.

HT is a high-speed, point-to-point, serial bus for chip-to chip interoonncet. You can check out the HyperTransport Consortium's home page here at http://www.hypertransport.org/ They have a FAQ page you might like to read.

Nvidia used an HT link to connect the Nforce2 NB and SB together. AMD also designed the K8 with several HT interconnects. These are used for inter-CPU communication in multi-CPU situations (And since each CPU has its own memory controller, high-speed interconnects between processors allow very good scaling of bandwidth with number of CPUs) and to connect the CPU to the rest of the system.

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You are always full of great information.

Thanks, I'll check out the HT site.