Hello
I got 2x512 CH-5 at 3.2v and AMD A64 3000+ that does 2600 mhz at 1.6v.
When i use 1T setting i can't run max mem and cpu in same time.
For example( all settings with 2-2-2 and 3.2v for mem, HTT 3x):
1T CPU: 10x240 mhz , MEM: 240 mhz - prime fail ( afer 1 min )
1T CPU: 8x240 mhz, MEM: 240 mhz - prime works ( 1 h )
2T CPU: 10x240 mhz, MEM: 240 mhz - prime works ( 1 h )
2T CPU: 8x290 mhz, MEM: 241 mhz - prime works ( 1 h )
Ill also add that i tried two other cpus and it was same.
I tried to swap dimm slots and change voltage.
Here are my ram settings , but changeing them at 1T doesent help at all:
Dram Frequency Set(Mhz)= 200(Mhz)(1/01)
Command Per Clock(CPC)= DEPENDS
Cas Latency Control(tCL)= 2
RAS# to CAS# delay(tRCD)= 2
Min RAS# active timing(tRAS)=10
Row Precharge timing(tRP)= 2
Row Cycle Time(tRC)= 15
Row Refresh cyc time(tRFC)= 16
Row to Row Delay(tRRD)=02
Write Recovery Time(tWR)= 2
Write to read Delay(tWTR)= 2
Read to Write delay(tRTW)=4
Refresh Period(tREF)=3120
Write CAS# Latency(tWCL)= 1
_____________________________________________
DQS skew Contro= Increase Skew
DQS Skew Value= 43
DRAM Drive Strength= Level 1
Max Asynce lantency=7ns
Read Preamble time=5ns
Idle Cycle Limit= 016
Dynamic Counter= Enable
R/W Queue Bypass=16x
Bypass Max= 07x
32 byte Granulation=Disable(8burst)
I got 2x512 CH-5 at 3.2v and AMD A64 3000+ that does 2600 mhz at 1.6v.
When i use 1T setting i can't run max mem and cpu in same time.
For example( all settings with 2-2-2 and 3.2v for mem, HTT 3x):
1T CPU: 10x240 mhz , MEM: 240 mhz - prime fail ( afer 1 min )
1T CPU: 8x240 mhz, MEM: 240 mhz - prime works ( 1 h )
2T CPU: 10x240 mhz, MEM: 240 mhz - prime works ( 1 h )
2T CPU: 8x290 mhz, MEM: 241 mhz - prime works ( 1 h )
Ill also add that i tried two other cpus and it was same.
I tried to swap dimm slots and change voltage.
Here are my ram settings , but changeing them at 1T doesent help at all:
Dram Frequency Set(Mhz)= 200(Mhz)(1/01)
Command Per Clock(CPC)= DEPENDS
Cas Latency Control(tCL)= 2
RAS# to CAS# delay(tRCD)= 2
Min RAS# active timing(tRAS)=10
Row Precharge timing(tRP)= 2
Row Cycle Time(tRC)= 15
Row Refresh cyc time(tRFC)= 16
Row to Row Delay(tRRD)=02
Write Recovery Time(tWR)= 2
Write to read Delay(tWTR)= 2
Read to Write delay(tRTW)=4
Refresh Period(tREF)=3120
Write CAS# Latency(tWCL)= 1
_____________________________________________
DQS skew Contro= Increase Skew
DQS Skew Value= 43
DRAM Drive Strength= Level 1
Max Asynce lantency=7ns
Read Preamble time=5ns
Idle Cycle Limit= 016
Dynamic Counter= Enable
R/W Queue Bypass=16x
Bypass Max= 07x
32 byte Granulation=Disable(8burst)