Memory timing, tRas at 11 improves bandwidth ???

The Anomaly: nVIDIA’s nForce2 and tRAS

An anomaly can be described as something that’s difficult to classify; a deviation from the norm or common form. This is exactly the situation with tRAS (Active to Precharge) and nVIDIA’s nforce2 chipset. As said before, not sparing the effort is what has lead to the initial discovery of this anomaly many months ago. It’s pretty well known by now, in a nutshell, a higher tRAS (i.e. higher than, say, the Mushkin mandated sum of CAS+tRCD+2) on nforce2 motherboards consistently shows slightly better results in several benchmarks and programs. In most cases, 11 seems to be the magic number. Other chipsets do not display this “deviation from the norm”, so what makes the nforce2 different?

This thread has been on the topic for a while now, and TheOtherDude has given a possible explanation for this anomaly.

“Unlike most modern chipsets, the Nforce2 doesn't seem to make internal adjustments when you change the tRAS setting in the BIOS. These "internal" (not really sure if that’s the right word) settings seem to include Bank Interleave, Burst Rate and maybe even Auto-precharge. For optimal performance, tRAS (as measured in clock cycles) should equal the sum of burst length, plus the finite time it takes the RAM to conduct a number of clock independent operations involved with closing a bank (~40 ns) minus one clock if Auto-precharge is enabled (this factor can be slightly effected by CAS, but should not play a role in optimal tRAS). To complicate things even more, one bank cannot precharge a row while the other specifies a column. This brings tRCD into the mix.

Higher isn't always better, but the reason everything is so weird with tRAS and the Nforce2 is simply because the chipset doesn't make the internal optimizations to accommodate your inputted tRAS value like most other chipsets.”

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