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Yeah, so now they both got 1Mb L2 cache what exaclt seperates these 2 chips, or are they getting rid of the FX acronymn?
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San Diego versus FX Chips, both have 1MB L2, Difference?
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i think the san diego chip has sse3
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prominance said:
Mate,
San Diego is the name given to the core whereas FX is the name of the finished product i.e the CPU. To make this clear, let me point out that we also have/will have FX-55 CPU's with the San Deigo core. Earlier FX CPU's were of the clawhammer core/family, made using a 130nm process. Sandeigo cores are made using a 90nm process and have an extra layer of copper interconnects.
So much for the physical/internal characterization. Also, as TIS says, the San Deigo CPU's have extra sets of instructions added, viz., SSE3. However, they still retain the 3DNow! super-set.
Hope this helps!
S-N
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^^ True. Let me add the only difference is fully unlocked multi up and down, as well as they have a higher default clock. They also typically have the best memory controllers and scale best. If you had a 4000+ Diego and a FX clocked the same, theoretically there would be no difference between the two.
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Another point is the FX has an unlocked multi.
Performance wise the SD is very close to .130nm FX.
*edit Sucka beat me on that one.....
Performance wise the SD is very close to .130nm FX.
*edit Sucka beat me on that one.....
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The points made by Sucka and Maxi has me thinking about the real benefits of a process shrink.
It doesn't seem to run any cooler than a 130nm Newcastle (Mine idles at 34C and I've heard ppl comlain that their's idles at the same on water! )
Now, I'm quite sure that the die shrink has nothing to do with all the goodies we obtain, i.e better stability and more OC'ing head room. Even in the latter case, a clawhammer holds up very well. Agreed that the stock voltage dropped, but the voltage response seems to be highly skewed as of now (I may be wrong about this). The benefits we see seem to stem from the architectural changes. I think AMD remapped the whole CPU structure. Winnys were almost as bad as the NC (on an avg), so whats the big deal with a die shrink?
It doesn't seem to run any cooler than a 130nm Newcastle (Mine idles at 34C and I've heard ppl comlain that their's idles at the same on water! )
Now, I'm quite sure that the die shrink has nothing to do with all the goodies we obtain, i.e better stability and more OC'ing head room. Even in the latter case, a clawhammer holds up very well. Agreed that the stock voltage dropped, but the voltage response seems to be highly skewed as of now (I may be wrong about this). The benefits we see seem to stem from the architectural changes. I think AMD remapped the whole CPU structure. Winnys were almost as bad as the NC (on an avg), so whats the big deal with a die shrink?
Comparing a 130nm Clawhammer based FX-55 with a 90nm San Diego core processor (say, a 3700+), you would likely find that the San Diego core is a little faster clock-for-clock by a small margin. I haven't seen a direct comparison, so I'm not 100% on this, although it makes sense.
The new and as-yet not particularly widespread San Diego based FX procesors will perform exactly the same clock-for-clock as any other San Diego based chip.
However, due to what appears to be aggressive speed binning on AMD's part, the FX series of processors almost always overclocks higher, takes voltage better, and seem to come with the best quality memory controllers, as Sucka said.
The new and as-yet not particularly widespread San Diego based FX procesors will perform exactly the same clock-for-clock as any other San Diego based chip.
However, due to what appears to be aggressive speed binning on AMD's part, the FX series of processors almost always overclocks higher, takes voltage better, and seem to come with the best quality memory controllers, as Sucka said.
Some "statistics" on various cores/CPU (SanDiego, FX, ClawHammer, ...) based on SuperPI 32M which stresses CPU, memory, chipset and system bus.
Different core performance results in SuperPI 32M
Analysis of different core performance in SuperPI 32M
Different core performance results in SuperPI 32M
Analysis of different core performance in SuperPI 32M
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One other thing the 130nm FX55 runs at 104W and doesnt have SSE3 the 90nm FX55 runs at 89W and has SSE3.
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Super Nade said:
Smaller dies = more per wafer of silicon. It's a money thing.
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and the TDP reduction I mentioned...
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The TDP issue isn't holding back the FX? I'd agree with sucka on it being just a case for $'s . As I understand it, you can't add SSE3 without reworking the architecture, right? And what about those unused registers in the previous cores (and the present one) ? Do you think that's a jigsaw to accept more instructions?
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The FX have ECC memory control but SD's core don't. Very small different.
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Robert said:
Wow! I was not aware of that. So is this a feature from the hurried FX-51 (S940) migration? But then, there is no architectural difference between the Optrons and the FX-51's right?
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Only the FX-51 and FX-53 socket 940 needed ECC ram, the rest of the FX used regular memory.
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the FX53 was there for the 939 systems too.
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So, are you guys saying the FX series (irrespective of it being a sledgehamer or a San Deigo) supports ECC? I always thought the MoBo needed to suppored ECC and it doesn't matter what the CPU does. The Dell (crap) P3 ~1GHz we use at school supports ECC RAM. So have Intel's always supported ECC RAM?
Apologies to the thread starter for jacking his thread
Apologies to the thread starter for jacking his thread
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only the 940 fx's supported ECC ram. intel is up to the chipset, i think they all can, but im not sure.
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sorry for the thread hijack but what is ecc ram?
EDIT: i need to learn to google before asking... http://www.easydesksoftware.com/news/news22.htm answers it well
"When you go to buy RAM and you see 16X64, this means 16 Meg X 64 Bits which is a 128 Meg stick of RAM. A stick of RAM that is ?x64 is non error correcting, while a stick of ?x72 is error correcting and runs slower that the 64. ECC RAM (error correcting code) is normally used on a server motherboard for more reliability and costs more, the extra 8 Bits is used to correct the data passing through. Your motherboard probably cannot use ECC RAM and if it able to use ECC RAM it cannot be combined with NON ECC RAM. ECC is parity RAM, Non-ECC RAM is Non-parity RAM. Most types of RAM come in either NON ECC or ECC."
EDIT: i need to learn to google before asking... http://www.easydesksoftware.com/news/news22.htm answers it well
"When you go to buy RAM and you see 16X64, this means 16 Meg X 64 Bits which is a 128 Meg stick of RAM. A stick of RAM that is ?x64 is non error correcting, while a stick of ?x72 is error correcting and runs slower that the 64. ECC RAM (error correcting code) is normally used on a server motherboard for more reliability and costs more, the extra 8 Bits is used to correct the data passing through. Your motherboard probably cannot use ECC RAM and if it able to use ECC RAM it cannot be combined with NON ECC RAM. ECC is parity RAM, Non-ECC RAM is Non-parity RAM. Most types of RAM come in either NON ECC or ECC."
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CCUABIDExORxDIE said:
You are right about that. Athlons don't support ECC RAM. Now, why in the world won't you have the capability of supporting ECC RAM if need be? Is there an architectural limitation to this? If Intel can do why can't AMD? Am I correct in assuming that all that needs to be done is add a few extra instructions and use the spare registers?
