We look at a little of Intel Data sheets:
AGTL input signals have differential input buffers which use V REF as a reference signal. AGTL
output signals require termination to 1.25 V. In this document, the term “AGTL Input” refers to the
AGTL input group as well as the AGTL I/O group when receiving. Similarly, “AGTL Output”
refers to the AGTL output group as well as the AGTL I/O group when driving.
The PWRGOOD signal input is a 1.8V signal level and must be pulled up to VCC CMOS1.8 .The
VTT_PWRGD is not 1.8V tolerant and must be connected to V TT (1.25V) . Other CMOS inputs
(A20M#, IGNNE#, INIT#, LINT0/INTR, LINT1/NMI, PREQ#, SMI, SLP#, and STPCLK#) are
only1.5 Vtolerantand mustbe pulled up to VCC CMOS1.5 . The CMOS, APIC, and TAP outputs are
open drain and must be pulled to the appropriate level to meet the input specifications of the
interfacing device.
Look at this Data sheets from INTEL, so we must :
1. AK4(VttPWRGD) must connect to AG1(VTT)
2. AK26(PWRGOOD) must connect to +1,8V or AL21(VTT),AN21(VTT).
3. AJ3 & AN3 to isolated by something.
Because AK4 & AK26 is input. That are need state logic.
If no input state can unstable
AGTL input signals have differential input buffers which use V REF as a reference signal. AGTL
output signals require termination to 1.25 V. In this document, the term “AGTL Input” refers to the
AGTL input group as well as the AGTL I/O group when receiving. Similarly, “AGTL Output”
refers to the AGTL output group as well as the AGTL I/O group when driving.
The PWRGOOD signal input is a 1.8V signal level and must be pulled up to VCC CMOS1.8 .The
VTT_PWRGD is not 1.8V tolerant and must be connected to V TT (1.25V) . Other CMOS inputs
(A20M#, IGNNE#, INIT#, LINT0/INTR, LINT1/NMI, PREQ#, SMI, SLP#, and STPCLK#) are
only1.5 Vtolerantand mustbe pulled up to VCC CMOS1.5 . The CMOS, APIC, and TAP outputs are
open drain and must be pulled to the appropriate level to meet the input specifications of the
interfacing device.
Look at this Data sheets from INTEL, so we must :
1. AK4(VttPWRGD) must connect to AG1(VTT)
2. AK26(PWRGOOD) must connect to +1,8V or AL21(VTT),AN21(VTT).
3. AJ3 & AN3 to isolated by something.
Because AK4 & AK26 is input. That are need state logic.
If no input state can unstable
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