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dual channel and 128 bit memory bus

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borg

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Sep 16, 2003
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Croatia / Hrvatska
This is my theory, please correct me:
Width of the memory bus is defined by the cpu and the memory controller (even though it is near the core in A64, I am looking at them as separate units) and it defines how many times cpu will have to fetch data from the RAM to fill the cache line (larger bus -> less multiplexing) thus increasing memory bandwith.
Dual channel is a memory controller only related technology, the cpu could run without it or with it (like pluging an XP into the nforce 2 and then nforce 2 ultra, it will work in both) and it enables accessing both modules at the same "speed", but the bus still could be 64 or 128 bits long.
Now, I hear a lot of talk about how socket 939 is good because of *dual channel* which will drastically increase bandwith. Since I know that gains from that technology are 15% max, I belive this is wrong?
I believe 939 introduces *128 bit mem bus* and dual channel is taken for granted. Is this correct?
 
The difference between dual channel memory and 128-bit memory bus is subtile in the case of the Hammer cores. The memory controller talks to the main memory over two DDR channels. Each is 64-bits wide, so if you only populate one of the channels, the memory interface will be 64-bits.

Now the memory controller also needs to talk to the core. Supposedly this is also done over a 128-bit bus (which is common to all Hammer cores and is not dependent on the socket). That makes the data bus wider than that of earlier Athlons and Pentiums. However, that does not mean that the core will get data faster from main memory. At best, it improves latency slightly.

Getting a 15% improvement between single and dual channel is about the most you would expect. That's because memory bandwidth just isn't _that_ important to performance.
 
sorry, couldn't answer earlier...

NookieN said:
Now the memory controller also needs to talk to the core. Supposedly this is also done over a 128-bit bus (which is common to all Hammer cores and is not dependent on the socket). That makes the data bus wider than that of earlier Athlons and Pentiums. However, that does not mean that the core will get data faster from main memory. At best, it improves latency slightly.

I've seen benchmarks around here where 939's memory scores surpass P4's ones in memory bandwith (which is really an improvement). This suggests that cpu is fetching data a lot faster then with the 64 bit bus, with or without dual channel.
I don't understand why that doesn't mean that the cpu is getting the data faster? Aren't L1 and L2 caches being populated with data a lot faster (=less clock cycles than before)?
Improving latency decreases time needed to fetch the data, so it must get data faster (you concluded something completly opposite)?
 
Yes it's true that in raw memory bandwidth benchmarks an A64 with dual channel on S939 can pull about 15% more data than a P4 with an 800Mhz FSB. However, that difference is mostly due to the overall reduction in latency of the on-die memory controller on the A64. Also keep in mind that the P4's FSB does not just handle transfers to and from memory; it deals with all northbridge communications, including data to and from the AGP and peripheral busses.

That 15% difference is not really due to the 128-bit memory bus in the A64 though. If that were a 64-but bus and it ran at twice the speed it does currently, it would deliver about the same bandwidth. Remember that the memory bus isn't caching anything, it can only send and receive data as fast as main memory can handle it. If you remove one of the memory channels (i.e. yank out one of the DIMMs) memory bandwidth will be cut in half, regardless of the width of the processor's memory bus.
 
Yeah, dual channel is like a raid-0 array, it nearly doubles the theoretical speed but due to interfece regulations it really dosn't make to much of a difference in actual performance. The memory controller may be able to send and recieve data to and from the RAM over two 64bit channels, but that doesn't necessarily mean that the cpu is getting two simultanious 64bit channels. In the A64's case, the memory controller is on die and greately reduces latencies and the dependency of the CPU on the northbridge. However, it is all dependant on the memory modules because they can only handle so much. Basically, dual channel is there for people who want the fastest computer, just like RAID-0 arrays, but the amount they really help is almost negligable.
 
so basically it comes down to this:
128 bit mem bus influence on performance is really tiny, but dual channel delivers 15% boost.
there is still a large question mark above my head :) because I thought dual channel was a chipset feature, and you still haven't commented on this. I thought all A64 processors can support dual channel, but only 939 have 128 mem bus.
754 A64 can't be set to use dual channel? (please explicitly answer this :) )
And than there's the 15% - when you say "15% more than P4" it is a world of difference from saying just "it's a 15% improvement", because P4 has almost double the mem bandwith of a XP.
Where does 128 bit mem bus fit into this? Isn't it giving the extra edge to A64 FX processors when paired to 1mb L2 A64s? What are concrete gains from it? (so far we've only been neglecting it)
 
there is still a large question mark above my head because I thought dual channel was a chipset feature, and you still haven't commented on this.
On athlon XP, and intel platforms it's a chipset feature. On Athlon 64 dual channel is part of the chip itself. with the integrated memory controller.
I thought all A64 processors can support dual channel, but only 939 have 128 mem bus.(please explicitly answer this )
Not all a64 support dual channel. socket 754 A64 only have a 64bit memory bus, while socket 939/940 a64 have dual 64bit memory busses, which equal a 128 bit memory bus.
And than there's the 15% - when you say "15% more than P4" it is a world of difference from saying just "it's a 15% improvement", because P4 has almost double the mem bandwith of a XP.
The dual channel A64 939 has about 15% more memory bandwith than an Intel P4 with an 865/875 chipset. However In the real world, the "improvement" from single to dual channel memory in both casses is only 15%. This is true for most applications since they don't need all that bandwith. Now this percentile will grow as applications need/ utilize the available bandwith.
Memory bandwith is not the amount of data the bus caries during usage, rather the theoretical amount that it can carry when applications need it. And this explains why 754 A64's and 939 A64's are about the same in gamming clock for clock. But are about 12% faster in divx encoding (939) overthere 754 counterparts.
 
I have a huge headache now, thanks a lot. :)
But I was able to understand.
 
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