Bartons have throttling?

[kaltag]

while searching around the net on some info 'bout the Bartons I came across a comment that the new Bartons have throttling similar to what the P4 has in order to keep the chip from melting itself in the chance the heatsink fails. Is this true? can't find anything on AMD's site about this.

 

[Pinky]

I'm going to guess that if they did, it would only be released as part of their mobility line of processors...

I've heard similar things about future releases having this, but I can't say for sure about the desktop Bartons...

 

[CrashOveride]

i am pretty sure they do... i dont think most mobos support it though.. dont know of any that do (AMD of course... weall know intel has it)

 

[boffin2163]

i havent herd of them having it but if they do it would be cool no more fried chips from bad h/s installs

 

[nikhsub1]

Most NF2 mobo's support throttling. I have it disabled. I 'think' it has to be implemented (turned on) in the bios for it to work.

 

[CrashOveride]

Most NF2 mobo's support throttling. I have it disabled. I 'think' it has to be implemented (turned on) in the bios for it to work.

oh... i though it was one supported it and the other didnt or something... but i guess the newer Nforce2s might support it... any one have on and a barton and wanna let their temps go up a bit?

 

[modenaf1]

i never heard anything about it but i am not surprised if they did implement throttling. I think Asus boards will throttle the cpu.

 

[pctuner@amd]

Most NF2 boards do support CPU Throttling at least I know for a fact the the Asus and the Abit do because I own both and I have it dissabled on the Abit I am running now..,.

 

[OC Detective]

Accroding to AMD and element of throttling can occur on Palominos, Tbreds and Bartons through the activation of STPCLK#.

Courtesy of the AMD technical documents:

"There are two mechanisms for asserting STPCLK#—hardware
and software.
The Southbridge can force STPCLK# assertion for throttling to
protect the processor from exceeding its maximum case
temperature. This is accomplished by asserting the THERM#
input to the Southbridge. Throttling asserts STPCLK# for a
percentage of a predefined throttling period: STPCLK# is
repetitively asserted and deasserted until THERM# is
deasserted.
Software can force the processor into the Stop Grant state by
accessing ACPI-defined registers typically located in the
Southbridge.
The operating system places the processor into the C2 Stop
Grant state by reading the P_LVL2 register in the Southbridge.
If an ACPI Thermal Zone is defined for the processor, the
operating system can initiate throttling with STPCLK# using
the ACPI defined P_CNT register in the Southbridge. The
Northbridge connects the AMD Athlon system bus, and the
processor enters the Probe state to service cache snoops during
Stop Grant for C2 or throttling."