3570k Isn't Running as Hot as Expected

[xander89]

I am going to use Vantage as one of the tests (cpu score on it). I'm also going to test wprime and superPi too. And I was also thinking of downloading the trial version of AIDA to do some synthetic tests. I will also use P95 to test heat with to compare the 2500K to the 3570K at 4.7.

What other free programs could I download and run to compare performance with?

i was thinking of doing some FPS on games, ( for people like me) and also encoding a movie (time it takes etc)

 

[manu2b]

Huh........ this went from temps to performance. Ok.

Are you taking the p.ss out of us?

EDIT: Aaaarrgghhh, moderatus maximus is watching the thread!

 

[EarthDog]

With vinegar!

Im personally interested in the temp part. The performance numbers are all over the web already...though maybe not specifically those tests. Anyhoo, want to see it all now!

 

[muddocktor]

The way I see it ED, is that there are 2 parameters to look at here. Heat, plus the slight IPC increase that IB brings to the table. Since I have a decent clocking 2500K already, I want to see what the performance increase the 3570K will bring at the same clock speed, as well as it's running temps. Then, after I get the data for the 3570K at 4.7, I will bring up the overclock on the 2500K to where the performance closely matches the 3570K @ 4.7 and see what clock speed and vcore are required, as well as temps. From what people are seeing so far, a 4.7 overclock on the 3570K should be getting towards the upper range of acceptable temps (I think) and if SB can get the same level of performance with lower temps, then I would think that a 2500K would be preferred.

BTW, this will be done on water in the system listed in my sig with the Biostar board. I'm hoping that the latest bios from Biostar properly supports retail IB procs properly. If not, then I will have to re-figure things out and maybe use the second P67 Extreme6 system in my sig as I know the latest bios for it properly supports retail IB.

 

[deseroner]

iam running prime right now on my 3770k, here is my 2700k at 4.4 yeah a little cooler.
ran prime 32 minutes


idle

 

[deseroner]

here are my test at 4.3 1.19v about 30 min prime.hopefully they start making better coolers for ivy .

after test idle

 

[deseroner]

i can probably get lower temps ,but that would mean turning antec 920 to extreme ,which is annoying to freaking loud 55 dba's or so.

 

[SF101]

just really seemed like a random comment with nothing more to it. something we have all seen trolls do to stir the pot is all and i for one thought your join date said may i apologize for that.

Also it doesn't have to be any 1 thing that's causing this its most likely a combination of things.

1. tim vs solder - most of the better oc chips have used solder in the past this is not random luck.

2. 3d transistors getting hotter at high volts.

im sure there are other good theorys but when you have multiple flaws you run into issues.

and sure they might have applied a heat sink to sit on the die but i still wonder how many heat pipes are making contact ect if its a solid tight mount?

so when you start to add more heat+ poor heat transfer things start to multiply as volts go up. its like when you go over the limit of a heatsink it suddenly starts to just get hotter and hotter.

just saying.

 

[GeneO]

But I think there is some evidence it is not the TIM, and no real evidence that it is (except intuition based on previous processors). That is why I said I doubt it.

I really had no antagonistic intention, I sure hope I will always give people the benefit of the doubt and not call them trolls for such a simple statement - even if their intent isn't good.

 

[xander89]

But I think there is some evidence it is not the TIM, and no real evidence that it is (except intuition based on previous processors). That is why I said I doubt it.

I really had no antagonistic intention, I sure hope I will always give people the benefit of the doubt and not call them trolls for such a simple statement - even if their intent isn't good.

Give me a link where they have 100% shown the TIM isn't a contributing factor? No point stating something that directly flys in the face of everything being said then not supplying anything to back it up. That is directly antagonising people whatever you might think and it just makes you look like a troll.

I just find it hard that you have heard about this but hardly anyone on this forum has. I've been following most of the IB threads and this is the first I've heard about the TIM not contributing to to heat whatsoever.

 

[deseroner]

testing 4.5 1.22v

 

[xander89]

testing 4.5 1.22v

that isnt looking too bad, Have you made sure you HS is seated properly? That third core is pretty hot ( or might just be the chip :S ) How do the temps fair when u go over 4.6?

 

[deseroner]

that isnt looking too bad, Have you made sure you HS is seated properly? That third core is pretty hot ( or might just be the chip :S ) How do the temps fair when u go over 4.6?

have not tried yet, will probably later today. iam beat. so far so good, i am pleased with results. i think it might be the core , i seated it once , but added some paste only not a complete do over .

 

[RGE]

But I think there is some evidence it is not the TIM, and no real evidence that it is (except intuition based on previous processors). That is why I said I doubt it.

I really had no antagonistic intention, I sure hope I will always give people the benefit of the doubt and not call them trolls for such a simple statement - even if their intent isn't good.

Removing IHS along with intels non-solder epoxy die attach and replacing with less effective user tim with questionable contact is not evidence of anything. Just shows removing 1 layer, but replacing with less effective die attach specs is a crapshoot. Pk1 even though high bulk thermal conductance, has no chance of competing with intels non-solder die attach in terms of voidless, no air pockets, contact resistance, bondline thickness.

Intel via third party already said it is tim difference + thermal density increase, but should be obvious anyways.

You can mathematically figure out the gradient across tim. At 120W load, the gradient across solder tim would be 1.2C, 120W x .0098C/W for solder specs listed in white paper linked below and see attached pic/chart. At 120W load of modern cpu, using best non-solder die attach specs from places that sell non-solder die attaches, gradient would be 5-8X that of solder or 6-9C increase in gradient over non-solder. It defies physics to argue tim change does not increase temps to some degree.

And changing the critical density from 32nm to 22nm, means thermal density increases significantly, so core temps will increase significantly.

The only question is how much of each contributes.

You can see from white paper pic, that paste on this cpu causes a 6C gradient across silver paste tim. Replace that with specs listed chart above for solder tim, and get less than 1C for solder. And that is with 20W. Modern non-solder die attaches have improved, but still lag 5-8X behind c/w of solder.
http://smithsonianchips.si.edu/ice/cd/PKG_BK/CHAPT_06.PDF

 

[xander89]

Removing IHS along with intels non-solder epoxy die attach and replacing with less effective user tim with questionable contact is not evidence of anything. Just shows removing 1 layer, but replacing with less effective die attach specs is a crapshoot. Pk1 even though high bulk thermal conductance, has no chance of competing with intels non-solder die attach in terms of voidless, no air pockets, contact resistance, bondline thickness.

Intel via third party already said it is tim difference + thermal density increase, but should be obvious anyways.

You can mathematically figure out the gradient across tim. At 120W load, the gradient across solder tim would be 1.2C, 120W x .0098C/W for solder specs listed in white paper linked below and see attached pic/chart. At 120W load of modern cpu, using best non-solder die attach specs from places that sell non-solder die attaches, gradient would be 5-8X that of solder or 6-9C increase in gradient over non-solder. It defies physics to argue tim change does not increase temps to some degree.

And changing the critical density from 32nm to 22nm, means thermal density increases significantly, so core temps will increase significantly.

The only question is how much of each contributes.

You can see from white paper pic, that paste on this cpu causes a 6C gradient across silver paste tim. Replace that with specs listed chart above for solder tim, and get less than 1C for solder. And that is with 20W. Modern non-solder die attaches have improved, but still lag 5-8X behind c/w of solder.
http://smithsonianchips.si.edu/ice/cd/PKG_BK/CHAPT_06.PDF

pwnd nice info there. I think this just puts the maths behind what everyone has said. Thermal density and TIM are together both contributing to the heat problems. We are not saying that solving the TIM issue will mean that it will run at lower temps than the SB, but at least the temps wont be so inflated

Also it has to be taken into account to get decent clocks on the IB a significantly lower voltage is needed than on the SB. Surely this would somewhat offset the extra heat generated by it being 22nm? I dont know the maths behind it, but i would think that there being nearly a .1v drop in the voltage needed to gain a similar clock would lead to temps dropping as well....?

 

[raident30]

pwnd nice info there. I think this just puts the maths behind what everyone has said. Thermal density and TIM are together both contributing to the heat problems. We are not saying that solving the TIM issue will mean that it will run at lower temps than the SB, but at least the temps wont be so inflated

Also it has to be taken into account to get decent clocks on the IB a significantly lower voltage is needed than on the SB. Surely this would somewhat offset the extra heat generated by it being 22nm? I dont know the maths behind it, but i would think that there being nearly a .1v drop in the voltage needed to gain a similar clock would lead to temps dropping as well....?

yes, lower voltages will generate less heat (less electricity less heat).. but i think, the TIM will still be a large factor in IB's temperature vs the solder of SB...

 

[xander89]

yes, lower voltages will generate less heat (less electricity less heat).. but i think, the TIM will still be a large factor in IB's temperature vs the solder of SB...

Yer I'm not saying that isnt the case just that Less V's will help to offset the amount of heat actually given off by the chip in the first place. Im not sure it will offset all the extra heat generated by it being 22nm over 32nm, but it will certainly help the temps of the actual chip stay lower.

In light of that surely the TIM is the main issue? But i dont have facts and figures to prove the lower voltage will offset all the extra heat but would be an interesting thing to look into.

 

[raident30]

a question has popped into my mind. isn't that cheap looking TIM (intel's special sauce) a way of intel's cost cutting to generate more income? i hope i don't get flamed on this question but i am really really curious...

 

[xander89]

a question has popped into my mind. isn't that cheap looking TIM (intel's special sauce) a way of intel's cost cutting to generate more income? i hope i don't get flamed on this question but i am really really curious...

most likely, it wasn't done for the increase in thermal performance . They are a corporation with a monopoly on the processor market, they dont have much to lose atm

 

[raident30]

most likely, it wasn't done for the increase in thermal performance . They are a corporation with a monopoly on the processor market, they dont have much to lose atm

competition, yes, that's one thing... AMD is quite silent for sometime after releasing the bulldozer.. i haven't heard any news about the Pile Driver for awhile now..