A case study in the impact of VRM Bulk Capacitors on Motherboards [WIP]

[Super Nade]

Work in Progress:
​

Introduction:

Much of the information available in the enthusiast world regarding recapping a motherboard falls into two categories:

1. A recap was done because the stock capacitors failed, rendering the motherboard inoperable.
2. Anecdotal evidence of "a higher overclock" being obtained was the motivation.

Note that in both cases, there is systematic way to quantify any improvements in performance. Mainboard manufacturers are left out of this discussion because they have, in all probability performed exhaustive studies that you or I on a six-pack budget can only dream of accomplishing.

In other words...
I basically have a few tools and I'm going to mess around with the setup as and when I can think of something new...


Aim and scope of this experiment:

If you guys know me well enough, you would understand that I don't like wishy-washy speculative BS. So let us get down to a simple outline of what I'm trying to accomplish.

1. Use signal quality analysis as a metric to gauge every proposal being made.
2. Study the impact of ESR, Voltage rating and Capacitance on CPU power delivery.

Method and Tools:

For this experiment, I will be using a Gigabyte S478 motherboard (onboard crapphix), a Textronix TDS524A DSO, an HP 8590B RF Spectrum Analyzer, A Textronix 2225 Analog Oscilloscope and a Silverstone Zeus ST56ZF, some generic crap DDR.

From what I have read and by scanning numerous Intel VRM design guidelines, Buck regulator datasheets, the issue that comes up over and over with regards to CPU stability is the amount of ripple/AC in the delivered power. This seems to depend on many factors like the inductor current, number of phases employed and the switching frequency.

Bulk capacitance is said to play a very important role in minimizing the amount of ripple current being allowed. Bulk capacitance includes the MLCC (Multi-Layer Ceramic capacitors) chip caps you see in the LGA775 socket for example, or directly on the CPU die and the ones near the phase inductors outside the CPU socket.

I will be looking at the effect of these bulk capacitors, more specifically the bulk cans outside the CPU socket.

Questions that will be addressed include:-

1. What happens when I change the capacitance value?
2. What happens when I add more capacitance?
3. What happens when I replace 6.3V 1500uF caps with 4V 560uF Sanyo OS-CON's?
4. What is the bandwidth of the AC riding the DC?
5. How do results change if I use an AC coupled probe over an uncoupled probe?

Setup pictures:

The setup is very simple. I've put a shielded cable in a vacant capacitor spot next to the inductor. This capacitor shunts the inductor to ground providing a low impedance path to the AC signal. So, this is going to be one of the spots of choice to test the effectiveness of all the shunt caps. The idea is, if the signal really noisy at this spot, then the capacitor bank is doing its job of shunting out AC to ground. So, I expect to see an INCREASE in noise if better caps are used.

If anything to the contrary is seen, my assumption of the regulation layout will be proven wrong and at that point I'll move the test point directly over the leg of one of the MOSFETS.

The board itself is pretty decent, with Rubycon, Nichion and Sanyo Aluminum Electrolytics. The only sore thumb being a pair of garbage OST's on the CPU VRM side.

 

[bing]

Great thread Nade !

Any plan to share us the scope shots at before & after at the cpu's Vcc load & idle to see the load transient response ?

Hoping you have the expensive many-many channels scope there, so at least we can see their performance on different phases, the fun part is to see those mixed results on phases with and without the cap addition !

 

[Super Nade]

The problem I see is with the probe. On the first run, it was bloody noisy. I'm going to take it to the lab next door, because there is a huge superconducting magnet (NMR machine) right next to my lab.

 

[bing]

Isn't that one of the worst place on earth for measuring electronic's signal ?

 

[Super Nade]

Actually, that may or may not be the case. I'm not sure. We have large inductive loads on the same supply line, courtesy of building services, so this has been a problem all along. Even the NMR guys are having problems during data collection.

 

[Overload]

hmm, just stumbled upon this. interesting project. i think it would also be helpful to have an impedence analyzer. the difficulty that these power caps have is provide low impedence at high switching currents. the current demands for a cpu at full load could easily reach hundreds of amps per nanosecond because it must maintain very tight square waveforms. its is essential that the inductance of a power cap be EXTREMELY low. usually the rule of thumb is you cant have too much capacitance. but larger capacitance usually means larger inductance as well because of the extra layers that are stacked or in some form of zig zag which adds a lot of inductance. of course one easy work around for this problem is to parallel a bunch of smaller caps. as you capacitors in parallel add and inductors shrink.

 

[Super Nade]

Been busy man, so no time get this running. I'll look into ESL measurements and their impact.

 

[sunrunner20]

Hmm, Sounds interesting and sounds like something I can add data too if I ever get the time. Dad's work has a crazy good Oscilloscope(used for measuring signal quality on ~3ghz signal buses).

 

[Hipcrostino]

any news on this Nade? I'm looking forward to the results!

 

[Super Nade]

I have some data, but I need time to analyze it. So far, the results are a bit hazy. I need more data.

 

[Roofles]

Fantastic! I can't wait to see how this turns out.