[Ret Sticky]Overclocking sndbx for A64 939 systems with Winchester, Opteron dual core

[hitechjb1]

@2.9 1.75v
memory is @ 2.9v

able to pass 3dmark but fail superPI

Then how about 280 MHz x 10, CPU at 2.8 MHz. Test to see whether it passes SuperPI 32M, or Prime95 small FFT and large FFT (for 15-30 min for testing). Measure the temperature also.

What was the temperature at 2.9 GHz 1.75V?

 

[OC NOOBIE]

hitech my chip is CBBH 0446

 

[hitechjb1]

hitech my chip is CBBH 0446

Should be CBBHD 0446, which has a better "record" for better overclocking result.

So try as listed in previous posts to get it to run SuperPI 32M, 3dmark 01/03, maybe also Prime95, without errors. Get some setting that is stable first.

CPU VDD 1.4 - 1.5 V for HTT from 240 - 250 MHz with x10 multiplier (CPU 2.4 - 2.5 GHz). Measure CPU temperature idle and load.

Or higher VDD towards 1.75 V (you tried that before) for HTT = 280 MHz with x10 (CPU at 2.8 GHz). Use as low voltage as possible, test 1.6, 1.7 V. Measure CPU temperature idle and load.

Also run memtest few loops to see whether memory can run 280 MHz 2.5-3/4-3/4-8 1T.

 

[OC NOOBIE]

should i upate my bios to 3.10??

 

[hitechjb1]

should i upate my bios to 3.10??

You may until it is needed, ..., but do the following first as suggested in the previous posts, systematically way first.

Have you tried 240 - 250 MHz with CPU at 2.4 - 2.5 GHz, with 1.4 - 1.5 V? What temperature?

Have you tried 280 MHz x 10 = 2.8 GHz with 1.6 - 1.7 V? What temperature? As you said 2.9 GHz was not stable with SuperPI 32M.


Try all these first as suggested earlier:

Bios 02/17/05 and bios 03/10/05 are good. The 02/18/05 should be OK.

If the SuperPI 32M is still failing after few runs, raise the voltage to 1.45 - 1.50 V to see whether it helps.

Can you also raise the temperature to less extreme, say around around 0 C to see what happens. At 0 C, it should be able to pass SuperPI 32M or Prime95 small FFT with 1.4 - 1.5 V at 2.4 GHz.

You have to get it to pass something such as SuperPI 32M, 3dmark 01/03 so that you know what is the baseline is. If not 2.4 GHz, then try 2.3 GHz (230 MHz x 10).

Raise the voltage to like 1.45 - 1.50 V to see whether CPU temperature increase, so you know the heat sink is making proper contact.

You said it was able to run at 2.9 GHz, what temperature was that? And was it stable? At what voltage?

Then how about 280 MHz x 10, CPU at 2.8 MHz. Test to see whether it passes SuperPI 32M, or Prime95 small FFT and large FFT (for 15-30 min for testing). Measure the temperature also.

What was the temperature at 2.9 GHz 1.75V?

 

[Gautam]

Don't the Winchesters have serious problems with subzero temperatures? I've heard of results where they actually scaled higher on air/water than on phase change. Bigtoe from OCZ said that it was due to an increase of the memory controller's drive strength at low temperatures...if your Winnie is suffering from the "cold bug," it might be better for you to swap your processor out for a 130nm 1/2 cache disabled Clawhammer 3500+.

 

[OC NOOBIE]

what is the clawhammer?? is the the amd64 3500 939

 

[hitechjb1]

Have you tried all the things I mentioned as summarized in two post back.

It won't take too much time to try and please report the results first.

One thing at a time and systematically first, I suggest.

 

[OC NOOBIE]

what is the difference between the venice and winchester?? beside the potential to overclock higher than winchester.

 

[g0dM@n]

The Venice has a much much more powerful memory controller; thus, giving the opportunity for people do run ddr400 speeds even with let's say 2-4gigs of RAM.

In the OCers eyes... better 1:1 fsb clocks with 2x512 kits

 

[OC NOOBIE]

Hitech,

I was able to get up to 280MHZ x10 @ 2.5-4-4-8 @ 3.0v
I am using single memory stick.
pass superPI 1M/8M/32M
pass 3dmark @80458
cpu temp @ load - 67C

I tried to go 290 x10 but I can't get SuperPI to pass at 1M. not exact in round error.

 

[hitechjb1]

Venice and San Diego

Desktop A64 939 (90 nm SOI DSL)
3000+: ADA3000DAA4BP 1.35/1.4V (DH8 E3 rev, 00020FF0h) <- Venice, 512 KB L2, 1.8 GHz, x9, 67 W
3200+: ADA3200DAA4BP 1.35/1.4V (DH8 E3 rev, 00020FF0h) <- Venice, 512 KB L2, 2.0 GHz, x10, 67 W
3500+: ADA3500DAA4BP 1.35/1.4V (DH8 E3 rev, 00020FF0h) <- Venice, 512 KB L2, 2.2 GHz, x11, 67 W
3800+: ADA3800DAA4BP 1.35/1.4V (DH8 E3 rev, 00020FF0h) <- Venice, 512 KB L2, 2.4 GHz, x12, 89 W

Desktop A64 939 (90 nm SOI DSL)
4000+: ADA4000DAA5BN 1.35/1.4V (SH8 E4 rev, 00020F71h) <- SanDiego, 1 MB L2, 2.4 GHz, x12, 89 W

First stepping code:
Venice CBBLE 0504

A64 940, 754, 939 CPU Models, OPN code, rating (post 5)

 

[hitechjb1]

Major difference between Venice (E3)/San Diego (E4) and Winchester (D0)/NewCastle (CG)/ClawHammer (CG):


1. Addition of SSE3 instructions which accelerate a number of different types of computation, including video encoding, scientific computing, and software graphics vertex shaders.
About Rev E and SSE3 instructions


2. Faster transistors by using a new form of strain silicon (on insulator) process called Dual Stress Liner, up to 24% faster transistor speed (quote from IBM/AMD announcement Dec 13, 2004). Hence there is good potential of getting higher clock when process and yield improve. (Note that 24% transistor speed increase may not translate directly and immediately into the same speed improvement for CPU clock, but rather is an upside potential).

In regular silicon, atoms are spaced apart with certain distance determined by the silicon lattice.

In stained silicon, silicon is deposted onto a substrate (such as silicon germanium) whose atoms are spaced apart in the lattice with larger distance than that in regular silicon lattice. Since atoms tend to align with one another, so the top silicon atoms are stretched or strained to align with the atoms underneath in the stretched lattice.

In strained silicon (lattice), electrons flow with less resistance and up to 70% faster, which in turns can lead to 35% faster chips without scaling down the size of transistors (numbers quoted from IBM).

Strained Silicon (SS) can be built on top of Silicon on Insulator (SOI), the two are not mutually exclusive. Intel, IBM, AMD, ... are building 90 nm chips using both SS and SOI in various ways. IBM called it SSDOI (Strained Silicon Directly on Insulator).

Conventional strained silicon on insulator is referred to as "singly stressed" only. The dual stress liner refers to both "stretched" and "compressed" on NFET and PFET respectively to achieve further speed improvement.

Some links about latest silicon technology, Silicon on Insulator (SOI), Strained Silicon (SS), Dual Stress Liner (DSL)


3. Venice/San Diego has improved memory controller which supports up to 4 double-sided memory modules running DDR400 (not sure about 1T yet) compared to DDR333 of Winchester, and also has better compatibility with various memory modules.


4. More metal layers in the E3/E4 revision chips.

...



A review from xbitlabs:
AMD Athlon 64 3800+ CPU: E3 Processor Core aka Venice at the Door

The performance of Venice compared to Winchester and NewCastle can be summarized in this graph from Xbitlabs (from above article).

It is assumed that all processors are tested at 3500+ rated frequency of 2.2 GHz. So according to the xbitlabs measurement, Venice is roughly 0.5 - 2% better than Winchester (say 1% average), 1 - 7% better than NewCastle (say 2-3% average) clock for clock.

 

[OC NOOBIE]

Hitch,

I have tried mushkin pc3500 black level2 memory and ocz 3200 platinium rev2 EL. I still get the same result.. Do you suggest I try out the G.skill that you have??

 

[hitechjb1]

Hitch,

I have tried mushkin pc3500 black level2 memory and ocz 3200 platinium rev2 EL. I still get the same result.. Do you suggest I try out the G.skill that you have??

If you have or can borrow the G. Skill memory modules, you can always try.

Have you tried and is it possible to raise the temperature of mach2 to above 0 C as suggested earlier? Some (not all) Winchester or in combination with certain motherboard/bios may have problems running at very low, sub-zero temperature.

But apparently you have been able to run it with single memory stick at 2.8 GHz (SuperPI 32M stable). At what voltage of CPU VDD was that?

How about at 2.7 GHz with 270 MHz x 10.

Have you checked double modules with memtest at HTT 270, 280, ... MHz?

 

[OC NOOBIE]

If you have or can borrow the G. Skill memory modules, you can always try.

Have you tried and is it possible to raise the temperature of mach2 to above 0 C as suggested earlier? Some (not all) Winchester or in combination with certain motherboard/bios may have problems running at very low, sub-zero temperature.

But apparently you have been able to run it with single memory stick at 2.8 GHz (SuperPI 32M stable). At what voltage of CPU VDD was that?

How about at 2.7 GHz with 270 MHz x 10.

Have you checked double modules with memtest at HTT 270, 280, ... MHz?

@270MHZ/280MHZ . my voltage is 1.60v
I have not try double ram memtest. The single stick pass

 

[OC NOOBIE]

Do you suggest upgrading to Venice when it comes out???

 

[hitechjb1]

In general, it depends on your budget, the applications and needs, also your existing system and CPU, ....

Venice gains about 1-2% average clock for clock over Winchester/NewCastle. When it is clear that Venice can be clocked much higher due to faster transistors, more metal layers, there will be further absolute gain in performance than the current limit for Winchester, NewCastle, ClawHammer.

I assume your goal is highest overclocking as you own a mach2. Since your current Winchester can only do 2.7 - 2.8 GHz (from what you described, I don't know whether you have tried everything, with potential cold bug also), getting a Venice or even a San Diego (if budget allows) would give you a good chance to get 3+ GHz with your mach2 and higher overall performance. But I would wait to see more test results and until the initial price settling down first.

In the mean time, if you cannot lower your mach2 temperature to 0 C for testing, you may try using air cooling to test your Winchester/memory controller with dual channels to see whether the problem is indeed due to sub-zero temperature.

If you can borrow an 130 nm FX or 130 nm 939 to test your mach2 with the DFI NF4 and memory, it would be good too so you can familiarize with the setup until Venice/San Diego is available.

 

[Molester]

the san diego core, as of now, will be released w/ a clock as high as 3.2ghz(200x16), of course, this will be the fx61

the venice is close behind w/ 3.0ghz(200x15)

this from http://www.c627627.com/amd/athlon64

now.... the race to 4ghz has already begun.....AMD GHZ!!!!!!

 

[hitechjb1]

Previous best SuperPI 32M run was 27 min 52 sec, new time is 27 min 40 sec.

It is obtained by reducing memory timing from 2.5-4-4-8 1T to 2.5-4-3-7 1T, memory frequency is lowered to 315 MHz from 317 MHz and
CPU is lowered to 2.83 GHz from 2.85 GHz from that previous result.

This shows a good trading memory frequency and CPU frequency with tighter memory timing.

CPU VDD voltage is also lowered from 1.55 V to 1.52 V, which is a plus.


CPU: Winchester 3000+ CBBHD 0447
memory: G. Skill 4400 LE 2 x 256 MB (Samsung TCCD)
motherboard: DFI LanParty UT NForce4 Ultra-D (rev. A02, bios 03/10/05)
cooling: XP-90, 80 mm Tornado with fan control
OS: Windows XP Professional SP1

- CPU: 2.83 GHz = 315 MHz x 9, 1.52 V
- memory: 315 MHz, 2.5-4-3-7 1T, 2.8 V
- SuperPI 32M completed in 27 min 40 sec