Winchester 90nm SS CPU Thread.. (Good Read)

[OC Detective]

xtremesystems.org

2.8Ghz+ has been getting more common every day. have seen a 3ghz air cooled, aswell. that was a fairly true statement....

Show me the 3GHz week 45 Winchester (that would mean NOT Charlies!!!) - hence the statement is false.
2.7 to 2.8 no complaints there if that was being claimed but many Winchesters (even pre week 40) are hitting that.

 

[PhobMX]

so where are these 0445 coming from? newegg got em?

 

[Overclocker550]

xtremesystems.org

2.8Ghz+ has been getting more common every day. have seen a 3ghz air cooled, aswell. that was a fairly true statement....

I told you. before you bash me and say I spew nonsense from my keyboard, read around, I was right

 

[crimedog]

I told you. before you bash me and say I spew nonsense from my keyboard, read around, I was right

you also don't read what people post

why doesn't this thread die?

 

[OC Detective]

I told you. before you bash me and say I spew nonsense from my keyboard, read around, I was right

Show me a week 45 3Ghz air cooled Winchester - like I said Charlies is NOT week 45. Oh and for those still clinging to the belief about strained silicon from week 45. (AMD and IBM held a joint conference call today)

http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543~91999,00.html
Notice they say first half of 2005 for implementation - that means it HAS NOT been implemented yet.
This dual stress liner is different from the SSDOI that is used by IBM already on 90nm and by AMD on the FX's
This is the process that will finally bring true 3GHz on air to AMD.

 

[OC-Master]

Show me a week 45 3Ghz air cooled Winchester - like I said Charlies is NOT week 45. Oh and for those still clinging to the belief about strained silicon from week 45. (AMD and IBM held a joint conference call today)

http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543~91999,00.html
Notice they say first half of 2005 for implementation - that means it HAS NOT been implemented yet.
This dual stress liner is different from the SSDOI that is used by IBM already on 90nm and by AMD on the FX's
This is the process that will finally bring true 3GHz on air to AMD.

We already know that Venice cored AMD64 chips which are to launch in Q1 2005 (January~Feb) and are to have SSDIO. Inquirer pointed out this morning that AMD is planning on slowly phasing in SSDIO between now and till the end of Q1 2005.

That means that their are already a few 90nm chips out their with this new process embedded into them. This press release you posted is nothing more than a paper launch and progress report stating SS process is on its way to all AMD 90nm parts.


OC-Master

 

[crimedog]

Yes OC-Master, you know this how? Have you laid eyes on one? Have you seen one screen shot? Has an inside source at AMD told you so? Just because they're upgrading their manufacturing process doesn't mean they're giving away the goods for free, you have no proof (especially about the week 45 date.)

 

[Overclocker550]

hes probably right, amd might not have SS on winchesters, just venice since how could they make em before the ibm deal? well frankly it doesnt really matter since winchesters will be 2nd fiddle to venice in a few months anyway. I really hope venice has an improved odc, does over 3GHz and works in cascades so we can see 45k marks broken

 

[crimedog]

http://www.theinquirer.net/?article=20149

And so will AMD, which said it wil gradually phase in strained silicon SOI for its 90 nanometre AMD64 chips during the first half of next year.

good bye crack pot theory?

 

[jamesavery22]

http://www.theinquirer.net/?article=20149



good bye crack pot theory?

With SS does it just move that logarithmic curve of power and ghz a few mhz over? Or does it actually change that curve?

edit------------

the graph mentioned here is what I meant:
http://www.ocforums.com/showpost.php?p=3259604&postcount=47

 

[OC Detective]

We already know that Venice cored AMD64 chips which are to launch in Q1 2005 (January~Feb) and are to have SSDIO. Inquirer pointed out this morning that AMD is planning on slowly phasing in SSDIO between now and till the end of Q1 2005.

That means that their are already a few 90nm chips out their with this new process embedded into them. This press release you posted is nothing more than a paper launch and progress report stating SS process is on its way to all AMD 90nm parts.


OC-Master

OK so the inquirer says from now till end of end of Q1 2005 and AMD says introducing them in H1 of 2005 and you believe The Inquirer? - now I know why your predictions are so far off the mark! Once again read the proper sources - what does this text mean
"AMD intends to gradually integrate the new strained silicon technology into all of its 90nm processor platforms, including its future multi-core AMD64 processors. AMD plans to ship the first 90nm AMD64 processors using the technology in the first half of 2005."

It has the use of FUTURE tense so that the processors DO NOT have the technology yet - give up and admit you got it wrong - again.
BTW I dont see anywhere on the Inquirer where it says from now till end of Q1 for introduction.

 

[Clevor]

Has anyone bought a winchester recently from anywhere like newegg or monarch, and what date do they currently have in stock?

Not Newegg. I picked up a week 44 3200+ Winnie over the weekend, here in Japan. That was before I read this thread, or I would have passed. I was pretty happy at 2300 @ 1.376, until I went for it last night. Result: 2600 @ 1.42 actual. It does 2550 @ 1.376. I haven't tried for more yet.

260x10, 3-3-3-6 with PQI TCCD good for a 32 sec SuperPI 1M. I don't run Prime, but it benches all four 'Marks and Aquamark, passes Sandra Arith/Multi, and PCMark2004 (all tests). Stable enough for me.

I'm running air using an Alpha sink. Board is a senile MSI K8N Neo2 Plat with so old 0404xxx NF3 chipset (Taiwan).

CPUZ says SH8-DO. In Everest, it says A64 4000+, 3 gig, SOI, but that may be more due to the current overclock?

Hell, I think most people would be happy with 2500-2600 @ 1.5 even .

 

[nigely]

i got my week 41 3000+ last week
running at 2.6g with neo2, about 1.4v actual
bios set to 1.45v
prime95 stable for 3 hours, havent tested longer, but everything seem fine
not sure if that is a SS CPU or not

 

[OC Detective]

We already know that Venice cored AMD64 chips which are to launch in Q1 2005 (January~Feb) and are to have SSDIO. Inquirer pointed out this morning that AMD is planning on slowly phasing in SSDIO between now and till the end of Q1 2005.

That means that their are already a few 90nm chips out their with this new process embedded into them. This press release you posted is nothing more than a paper launch and progress report stating SS process is on its way to all AMD 90nm parts.


OC-Master

Oh and this quote it totally wrong too! SSDIO is what is used on current IBM's and on the FX - it is first generation strained silicon.

http://www.reed-electronics.com/semiconductor/article/CA456681?pubdate=10/1/2004&industryid=3033

The second generation strained silicon is called dual stress liner NOT SSDIO!
Oh and the press release formed part of a conference call that IBM and AMD held jointly and is certainly not a paper launch.
Try for once in your life to get your facts correct, your attempts at backtracking on your wild claims are quite pitiful.