- Joined
- Oct 1, 2023
After extensive testing i managed to set up timings to get best performance i could out of this ram kit.
G.SKILL Trident Z5 RGB Series CL34-45-45-115 1.40V F5-7200J3445G16GX2-TZ5RS
RYZEN 5 7600X @ 5.7GHZ
ASUS X570-P with 1654 bios – newest agesa 25/08/2023
Infinity fabric clock at 2100mhz
TRFC 480 @ 133,33 ns
These were best timings i could reach and still be stable in games and in overnight TestMem5.
If anyone has further suggestions let me know.. I will be testing further with increasing ram speed from here..
I also managed to do a 8000mhz stable ram frequency but timings were so horrible it was not even worth it.
https://hwbot.org/submission/5325923_delvechio212_memory_frequency_ddr5_sdram_4000_mhz
Memory Timings
CAS Latency (CL) 36T
RAS To CAS Delay (tRCD) 46T
RAS Precharge (tRP) 38T
RAS Active Time (tRAS) 36T
Row Cycle Time (tRC) 72T
Row Refresh Cycle Time (tRFC) 312T, 2x Fine: 192T
Command Rate (CR) 1T
RAS To RAS Delay (tRRD) Different Rank: 0T, Same Bank Group: 8T, Diff. Bank Group: 4T
Write Recovery Time (tWR) 48T
Read To Read Delay (tRTR) Different Rank: 12T, Different DIMM: 6T, Same Bank Group: 6T, Diff. Bank Group: 1T
Read To Write Delay (tRTW) 18T
Write To Read Delay (tWTR) 7T, Same Bank Group: 22T, Diff. Bank Group: 6T
Write To Write Delay (tWTW) Different Rank: 15T, Different DIMM: 7T, Same Bank Group: 6T, Diff. Bank Group: 1T
Read To Precharge Delay (tRTP) 12T
Four Activate Window Delay (tFAW) 20T
Write CAS Latency (tWCL) 34T
Write RAS To CAS Delay (tRCDW) 46T
Refresh Period (tREF) 65535T
G.SKILL Trident Z5 RGB Series CL34-45-45-115 1.40V F5-7200J3445G16GX2-TZ5RS
RYZEN 5 7600X @ 5.7GHZ
ASUS X570-P with 1654 bios – newest agesa 25/08/2023
Infinity fabric clock at 2100mhz
TRFC 480 @ 133,33 ns
These were best timings i could reach and still be stable in games and in overnight TestMem5.
If anyone has further suggestions let me know.. I will be testing further with increasing ram speed from here..
I also managed to do a 8000mhz stable ram frequency but timings were so horrible it was not even worth it.
https://hwbot.org/submission/5325923_delvechio212_memory_frequency_ddr5_sdram_4000_mhz
Memory Timings
CAS Latency (CL) 36T
RAS To CAS Delay (tRCD) 46T
RAS Precharge (tRP) 38T
RAS Active Time (tRAS) 36T
Row Cycle Time (tRC) 72T
Row Refresh Cycle Time (tRFC) 312T, 2x Fine: 192T
Command Rate (CR) 1T
RAS To RAS Delay (tRRD) Different Rank: 0T, Same Bank Group: 8T, Diff. Bank Group: 4T
Write Recovery Time (tWR) 48T
Read To Read Delay (tRTR) Different Rank: 12T, Different DIMM: 6T, Same Bank Group: 6T, Diff. Bank Group: 1T
Read To Write Delay (tRTW) 18T
Write To Read Delay (tWTR) 7T, Same Bank Group: 22T, Diff. Bank Group: 6T
Write To Write Delay (tWTW) Different Rank: 15T, Different DIMM: 7T, Same Bank Group: 6T, Diff. Bank Group: 1T
Read To Precharge Delay (tRTP) 12T
Four Activate Window Delay (tFAW) 20T
Write CAS Latency (tWCL) 34T
Write RAS To CAS Delay (tRCDW) 46T
Refresh Period (tREF) 65535T